Browsing by Subject "Lithography"
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Item Advanced lithographic patterning technologies : materials and processes(2007-05) Taylor, James Christopher, 1980-; Willson, C. G. (C. Grant), 1939-Item Advanced lithographic patterning technologies: materials and processes(2007) Taylor, James Christopher; Willson, C. G. (C. Grant), 1939-Item Advanced materials for block copolymer lithography(2013-05) Bates, Christopher Martin; Willson, C. Grant, 1939-The multi-billion dollar per year lithography industry relies on the fusion of chemistry, materials science, and engineering to produce technological innovations that enable continual improvements in the speed and storage density of microelectronic devices. A critical prerequisite to improving the computers of today relies on the ability to economically and controllably form thin film structures with dimensions on the order of tens of nanometers. One class of materials that potentially meets these requirements is block copolymers since they can self-assemble into structures with characteristic dimensions circa three to hundreds of nanometers. The different aspects of the block copolymer lithographic process are the subject of this dissertation. A variety of interrelated material requirements virtually necessitate the synthesis of block copolymers specifically designed for lithographic applications. Key properties for the ideal block copolymer include etch resistance to facilitate thin film processing, a large interaction parameter to enable the formation of high resolution structures, and thin film orientation control. The unifying theme for the materials synthesized herein is the presence of silicon in one block, which imparts oxygen etch resistance to just that domain. A collection of silicon-containing block copolymers was synthesized and characterized, many of which readily form features on approximately the length scale required for next-generation microelectronic devices. The most important thin film processing step biases the orientation of block copolymer domains perpendicular to the substrate by control of interfacial interactions. Both solvent and thermal annealing techniques were extensively studied to achieve orientation control. Ultimately, a dual top and bottom surface functionalization strategy was developed that utilizes a new class of "top coats" and cross-linkable substrate surface treatments. Perpendicular block copolymer features can now be produced quickly with a process amenable to existing manufacturing technology, which was previously impossible. The development of etching recipes and pattern transfer processes confirmed the through-film nature of the features and the efficacy of both the block copolymer design and the top coat process.Item Applications of neural networks in IC lithography(Texas Tech University, 1995-05) Mahendra, ManishaNot availableItem Applications of self-assembly : liquid crystalline semiconductors and DNA-conjugated microparticles(2012-12) Tang, Hao, 1985-; Willson, C. Grant, 1939-Self-assembly provides an efficient way to build complex structures with great flexibility in terms of components and properties. This dissertation presents two different forms of self-assembly for technical applications. The first example is the molecular assembly of liquid crystals (LCs). Attaching appropriate side chains on anthracene, oligothiophene, and oligoarenethiophene successfully constructed liquid crystalline organic semiconductors. The phase transitions of the LC semiconductors were analyzed by differential scanning calorimetry (DSC) and polarized optical microscopy (POM). The effect of the LC phase change on charge transport was probed by the space-charge limited current (SCLC) method and the field-effect transistor (FET) method. Mobility in the LC phase rose in anthracenyl esters but decreased in oligothiophenes and oligoarenethiophenes. The different electronic behavior of LC semiconductors may be caused by the difference in domain size and/or the difference in response to electric field. The second example of self-assembly in this dissertation is DNA-guided self-assembly of micrometer-sized particles. Patternable bioconjugation polymers were synthesized to allow for lithographic patterning and DNA conjugation. The base pairing of DNA was then used to drive the self-assembly of DNA-conjugated particles. The DNA conjugation chemistry was studied in detail using a fluorescence-based reaction test platform. The conjugated DNA on the polymer surface retained its ability to hybridize with its complement and was efficient in binding microspheres with complementary strands. Highly specific bead-to-bead assembly was analyzed using imaging flow cytometry, and the fractions of self-assembly products were explained on the basis of chemical equilibrium. The process of particle fabrication using photolithography was successfully developed, and the self-assembly of lithographically-patterned particles was demonstrated. We envision that the technologies described in this dissertation will be useful in a variety of fields ranging from microelectronics to biotechnology.Item Case studies on lithography-friendly vlsi circuit layout(2009-05-15) Shah, Pratik JitendraMoore?s Law has driven a continuous demand for decreasing feature sizes used in Very Large Scale Integrated (VLSI) technology which has outpaced the solutions offered by lithography hardware. Currently, a light wavelength of 193nm is being used to print sub-65nm features. This introduces process variations which cause mismatches between desired and actual wafer feature sizes. However, the layout which affects the printability of a circuit can be modified in a manner which can make it more lithography-friendly. In this work, we intend to implement these modifications as a series of perturbations on the initial layout generated by the CAD tool for the circuit. To implement these changes we first calculate the feature variations offline on the boundaries of all possible standard cell pairs used in the circuit layout and record them in a Look-Up Table (LUT). After the CAD tool generates the initial placement of the circuit, we use the LUT to estimate the variations on the boundaries of all the standard cells. Depending on the features which may have the highest feature variations we assign a cost to the layout and our aim is now to reduce the cost of the layout after implementing perturbations which could be a simple cell flip or swap with a neighboring cell. The algorithm used to generate a circuit placement with a low cost is Simulated Annealing which allows a high probability for a solution with a higher cost to be selected during the initial iterations and as time goes on it tends closer to the greedy algorithm. The idea here is to avoid a locally optimum solution. It is also essential to minimize the impact of the iterations performed on the initial solution in terms of wirelength, vias and routing congestion. We validate our procedure on ISCAS85 benchmark circuits by simulating dose and defocus variations using the Mentor tool Calibre LFD. We obtain a reduction of greater 20% in the number of instances with the highest cell boundary feature variations. The wirelength and the number of vias showed an increase of roughly 2.2-8.8% and 1.2- 7.8% respectively for different circuits. The routing congestion by and large remains unaffected.Item Catalysis and materials development for photolithography(2014-08) Mesch, Ryan Alan; Willson, C. Grant, 1939-; Keatinge-Clay, Adrian; Ellison, Christopher; Rose, Michael; Stevenson, KeithIn recent years the microelectronics industry as found itself at an impasse. The tradition pathway towards smaller transistors at lower costs has hit a roadblock with the failure of 157 nm lithography and the continued delays in 13.5 nm extreme ultra violet light sources. While photolithography has been able to keep pace with Moore’s law over the past four decades, alternative patterning technologies are now required to keep up with market demand. The first section of this dissertation discusses the new resolution enhancement technique develop in the Willson lab termed pitchdivision. Through the incorporation of specifically tailored photobase generators (PBGs) into commercially available resists, the resolution of current 193 tools may be doubled. Special two-stage PBGs were designed and synthesized to increase the image fidelity of pitchdivision patterns. The next project deals with the design, synthesis, and evaluation of resists that find amplification through unzipping polymers. An aromatizing polyester polymer that acts as dissolution inhibitor in novolac and is inherently sensitive to 13.5 nm exposure is discussed. Initial results show excellent sensitivity and promise towards a new class of EUV resists.Item Design for manufacturing with advanced lithography(2014-08) Yu, Bei; Pan, David Z.Shrinking the feature size of very large scale integrated circuits (VLSI) with advanced lithography has been a holy grail for the semiconductor industry. However, the gap between manufacturing capability and the expectation of design performance becomes critically challenged in sub-16nm technology nodes. To bridge this gap, design for manufacturing (DFM) is a must to co-optimize both design and lithography process at the same time. DFM for advanced lithography could be defined very differently under different circumstances. In general, progress in advanced lithography happens along three different directions: (1) New patterning technique (e.g., layout decomposition for different patterning techniques); (2) New design methodology (e.g., lithography aware standard cell design and physical design); (3) New illumination system (e.g., layout fracturing for EBL system, stencil planning for EBL system). In this dissertation, we present our research results on design for manufacturing (DFM) with multiple patterning lithography (MPL) and electron beam lithography (EBL) addressing these three DFM research directions in advanced lithography. For the research direction of new patterning technique, we study the layout decomposition problems for different patterning technique and explore four important topics: (1) layout decomposition for triple patterning; (2) density balanced layout decomposition for triple patterning; (3) layout decomposition for triple patterning with end-cutting; (4) layout decomposition for quadruple patterning and beyond. We present the proof that triple patterning layout decomposition is NP-hard. Besides, we propose a number of CAD optimization and integration techniques to solve different problems. For the research direction of new design methodology, we will show the limitation of traditional design flow. That is, ignoring triple patterning lithography (TPL) in early stages may limit the potential to resolve all the TPL conflicts. We propose a coherent framework, including standard cell compliance and detailed placement, to enable TPL friendly design. Considering TPL constraints during early design stages, such as standard cell compliance, improves the layout decomposability. With the pre-coloring solutions of standard cells, we present a TPL aware detailed placement where the layout decomposition and placement can be resolved simultaneously. In addition, we propose a linear dynamic programming to solve TPL aware detailed placement with maximum displacement, which can achieve good trade-off in terms of runtime and performance. For the EBL illumination system, we focus on two topics to improve the throughput of the whole EBL system: (1) overlapping aware stencil planning under MCC system; (2) L-shape based layout fracturing for mask preparation. With simulations and experiments, we demonstrate the critical role and effectiveness of DFM techniques for the advanced lithography, as the semiconductor industry marches forward in the deeper sub-micron domain.Item Design of silicon-containing block copolymer materials for applications in lithography(2016-12) Blachut, Gregory; Willson, C. Grant, 1939-; Ellison, Christopher J.; Ganesan, Venkat; Mack, Chris A.; Akinwande, DejiContinual advancement in microelectronic performance has made microelectronics essentially ubiquitous, enriching modern life in ways unimaginable even a few decades ago. The advancement in microelectronic devices is made possible by advancements in the manufacturing processes used to make them. Chief among these technologies is lithography, the process by which the individual components on the device are patterned. At present, complex and complicated double-patterning processes are being used to extend the resolution of the lithographic methods used in high-volume manufacturing, but only at great cost. Future generations of microelectronic devices will require even further use of multiple-patterning processes, at which point the economics of manufacturing could prevent the commercialization of such devices. This economic reality has spurred interest in alternative patterning technologies. One of the leading potential methods is to exploit the self-assembly of block copolymers (BCPs). BCPs are a type of polymer consisting of two or more chemically distinct blocks that are covalently joined together. The components of a BCP can phase-separate, and the resultant features form on the 5 to 50 nm length-scale. This size range is coincidentally ideal for next-generation semiconductor devices. However, BCPs on their own do not immediately form device-relevant features. Processes known collectively as directed self-assembly (DSA) are needed to properly guide BCPs. The work in this dissertation focuses on a very specific class of BCPs, those that contain silicon in just one of the blocks. The presence of silicon in the molecule produces many lithographic advantages, but also requires specialized processing steps. Chapter 1 provides an overview of lithography and block copolymer self-assembly. Chapter 2 introduces the materials and techniques needed to control the behavior of silicon-containing BCPs. Chapter 3 presents and characterizes a variety of silicon-containing BCPs. Last, Chapters 4 and 5 describe two implementations of silicon-containing BCP DSA, one for semiconductor patterning, and the other for hard disk drive applications.Item Design, synthesis, and application of lithographic resists and nonlinear optical materials(2009-05) Long, Brian Keith; Willson, C. G. (C. Grant), 1939-Fluorinated norbornene monomers exhibit the requisite properties for inclusion in 157 nm photoresists, but traditional addition and radical polymerizations with these monomers have failed. Norbornanediols provide an alternate route to these materials via condensation polymerization, and methods have been developed for the efficient synthesis of the exo-2-syn-7- and endo-2-exo-3-dihydroxynorbornanes. Synthesis of the fluorinated analogues is complicated by steric and electronic effects; however, a high-yielding synthesis of endo-2-exo-3-dihydroxynorbornane bearing a 5-endo-[2,2-bis(trifluoromethyl)hydroxyethyl] substituent as well as its corresponding polymer are reported. As an alternative to 157 nm and other optical lithographies, Step and Flash Imprint Lithography, or S-FIL®, was introduced in 1999 by The University of Texas at Austin. It has proven to be a cost effective, high resolution alternative to traditional optical lithography. Often in the S-FIL process, residual resist may become imbedded within the template features resulting in device defects due to the imprint and repeat nature of S-FIL. The high silicon and cross-linking content of the resist formulations are extremely difficult, if not impossible to remove from quartz imprint mold without template degradation. Our approach to this problem was the synthesis of a family of thermally reversible, cross-linkable monomers that will facilitate resist removal while maintaining template integrity. Our monomers utilize classic Diels-Alder chemistry to provide thermal reversibility, while pendant acrylate functionalities facilitate cross-linking. Herein we report the synthesis of several Diels-Alder compounds, incorporate them into resist formulations, and test their efficacy for resist removal. In an effort to develop unique patternable materials, our laboratory is currently engaged in the design and development of photonic crystals comprised of organic elements with highly stable electro-optic activity. Fabrication of these devices requires polymers that can be patterned at high resolution, have large second order nonlinear optical (NLO) coefficients, and that are thermally stable after poling. Our route to these materials involves the synthesis of a prepolymer that can be spin coated, poled, and then fixed by a photochemical cross-linking reaction. We now describe an efficient synthetic route to a new class of biscross-linkable monomers and the characteristics of their corresponding nonlinear optical polymers.Item Design, synthesis, and engineering of advanced materials for block copolymer lithography(2015-05) Durand, William John; Willson, C. Grant, 1939-; Ellison, Christopher J.; Bonnecaze, Roger T; Truskett, Thomas M; Akinwande, DejiBlock copolymers (BCPs) are an attractive alternative for patterning applications used to produce next-generation microelectronic devices. Advancements require the development of high interaction parameter χ BCPs that enable patterning at the sub-10 nm length scale. Several organosilicon BCPs were designed to both enhance χ and impart an inherent etch selectivity that facilitates pattern transfer processes. Increasing the BCP silicon content both increases χ and bolsters the etch resistance, providing a pathway to designing new high-χ materials. Unfortunately, the BCPs investigated are not amenable to thermal annealing because the organosilicon block preferentially segregates to an air/vacuum interface and drives orientation parallel to the surface. A series of spin-coatable, polarity-switching top coats (as well as other strategies) were developed to provide a “neutral” top interface and promote the perpendicular orientation of BCP domains. In addition, a methodology for evaluating the neutral condition, relying on thickness quantization and the corresponding wetting behavior (i.e. island/hole topography) of lamellae. The top coat strategy was demonstrated for several BCP systems, and perpendicular structures can successfully be etched on commercial tools and be transferred into underlying substrates. The interaction parameter χ was evaluated using two methods to compare the performance of several BCPs: the order-disorder transition (ODT) of symmetric diblock copolymers, and the absolute scattering profile of a disordered BCP melt. Both methods, while severely limited for quantitative comparison, indicate trends towards higher χ with additional appended polar and organosilicon functional groups. Furthermore, the pattern fidelity is shown to be a function of the overall BCP segregation strength. The free energy of confined lamella was modeled algebraically to produce response surface plots capable of identifying process conditions favorable for perpendicular orientation. Thickness independent perpendicular orientation is only favorable using two neutral interfaces. Incommensurate film thicknesses are the most favorable, with commensurability conditions dependent on the wetting behavior at each interface. The modeling was supplemented with an extensive body of thin film experimental work that qualitatively agrees well with the above conclusions.Item Evaluation and extension of threaded control for high-mix semiconductor manufacturing(2010-12) Patwardhan, Ninad Narendra; Flake, Robert H.; Edgar, Thomas F.In the recent years threaded run-to-run (RtR) control algorithms have experienced drawbacks under certain circumstances, one such trait is when applied to high-mix of products such as in Application Specific Integrated Circuits (ASIC) foundries. The variations in the process are a function of the product being manufactured as well as the tool being used. The presence of semiconductor layers increases the number of times the lithography process must be repeated. Successive layers having different patterns must be exposed using different reticles/masks in order to maximize tool utilizations. The objectives of this research are to develop a set of methodologies for evaluation and extension of threaded control applied to overlay. This project defines methods to quantify the efficacy of threaded controls, finds the drawbacks of threaded control under production of high mix of semiconductors and suggests extensions and alternatives to improve threaded control. To evaluate the performance of threaded control, extensive simulations were performed in MATLAB. The effects of noise, disturbances, sampling and delays on the control and estimation performance of threaded controller were studied through these simulations. Based on the results obtained, several ideas to extend threaded control by reducing overall number of threads, by improving thread definitions and combination have been introduced. A unique idea of sampling the measurements dynamically based on the estimation accuracy is also presented. Future work includes implementing the extensions to threaded control suggested in this work in real production data and comparing the results without the use of those methods. Future work also includes building new alternatives to threaded control.Item Fluid management in immersion and imprint microlithography(2010-12) Bassett, Derek William; Bonnecaze, R. T. (Roger T.); Ekerdt, John G.; Schunk, Randy; Sreenivasan, S. V.; Willson, GrantThe important roles of fluid dynamics in immersion lithography (IL) and step-and-flash imprint lithography (S FIL) are analyzed experimentally and theoretically. In IL there are many challenges with managing a fluid droplet between the lens and the wafer, including preventing separation of the fluid droplet from the lens and deposition of small droplets behind the lens. Fluid management is also critical in S FIL because the imprint fluid creates capillary and lubrication forces, both of which are primarily responsible for the dynamics of the template and fluid motion. The fluid flow and shape of the wafer determine how uniform the gap height between the wafer and the template is, and they affect the resistance during the alignment phase. IL was investigated as a methodology to improve laser lithography for making photomasks. The fluid flow in IL was investigated by building a test apparatus to simulate the motion of the fluid droplet during microlithographic production, and using this apparatus to conduct experiments on various immersion fluids and wafer topcoats to determine what instabilities would occur. A theoretical model was used to predict the fluid separation instabilities. Finite element simulations were also used to model the fluid droplet, and these simulations accurately predict the fluid instabilities and quantitatively agreed with the model and experiments. It is shown that the process is viable: capillary forces are sufficient to keep the fluid droplet stable, heating effects due to the laser are negligible, and other concerns such as evaporation and dissolution are manageable. Euler beam theory and the lubrication equation were used to model the bending of an S FIL template and the flow of the fluid between the template and a non-flat wafer. The template filling time, conformance of the template to the wafer, and the alignment phase are investigated with an analytical model and finite element simulations. Analysis and simulations show that uniformity of the residual film thickness and ease of proper alignment depend greatly on the planarity of the wafer, the properties of the template, and the surface tension of the fluid.Item Innovative technologies for and observational studies of star and planet formation(2015-05) Gully-Santiago, Michael Anthony; Jaffe, D. T.; Lacy, John H; Evans, Neal J; Kraus, Adam L.; Weinberger, Alycia JI summarize the optical design, fabrication, and performance of silicon diffractive optics for astronomical spectrographs. The first set of optical devices includes diffraction-limited, high-throughput silicon grisms for JWST-NIRCam. These grisms served as pathfinders to Silicon immersion gratings, which offer size and cost savings for high-resolution near-infrared spectrographs. I demonstrate the production and optical evaluation of the immersion grating that enabled IGRINS at the McDonald Observatory. This grating provides spectral resolution R=40,000 over the H and K near-infrared band atmospheric windows 1.5-2.5 micron. Electron-beam lithography offers much higher precision over contact mask photolithography for the production of Si immersion gratings. Electron-beam patterned prototypes are stepping-stones to monolithic Si gratings for iSHELL and GMTNIRS. The monolithic design of Si immersion gratings presents a limitation for scaling up the grating size, since existing fabrication equipment cannot handle monolithic silicon pucks. The size limitation can be overcome by direct-bonding Si substrates to optical prisms. I demonstrate a technique to measure interfacial gaps as small as 14 nm between the bonding interfaces, which produce 0.2% transmission loss. These technologies will enable the direct measurement of the atmospheric properties of extrasolar planets in the next decade. IGRINS is now measuring fundamental properties of young solar-mass stars; low luminosity young brown dwarfs are below the sensitivity limit of existing high spectral resolution near-IR spectrographs. My approach to the discovery and characterization of young brown dwarfs therefore employs low-resolution R~2000 near-IR spectroscopy. I confirm and characterize 17 candidate young stars and brown dwarfs reported by Allers and collaborators. All 17 sources have circumstellar disks. Using deep optical, near-infrared, and mid-infrared photometry, I search an off-core region towards the nearby ~1 Myr Ophiuchus star forming cluster for candidate young stars and brown dwarfs. Multi-object I-band spectroscopy of 419 candidates reveals 12 new members. Ten of these have no evidence for mid-IR excess emission from 3.6 to 8.0 micron. The disk fraction for spectral types M4 and later towards this region of Ophiuchus is 5/15. Two of the disk sources have edge-on disks, pointing to a high edge-on disk fraction. I discuss possible sources of contamination in the survey.Item Lithographic patterning of polymeric media for biotechnology applications(2013-12) Deschner, Ryan Phillip; Willson, C. G. (C. Grant), 1939-; Ellington, Andrew; Ellison, Christopher; Bonnecaze, Roger; Korgel, BrianLithographic patterning has heavily utilized in the semiconductor industry for its ability to pattern vast numbers of complex shapes down to the nanometer scale. However, only recently has this technology been employed in the biotechnology field despite the fact that most of that the most important biological components such as cells, antibodies, DNA and proteins operate at this level. This work is an exploration of the use of lithographic printing methods in two areas deeply-entrenched in biotechnology: self assembly and microarray-based manipulation of biological media. It was inspired by the natural self assembly which occurs in nature and in our bodies at all scales. The majority of this work dealt with the patterning of bioreactive copolymers into different three-dimensional microshapes which could be functionalized with single strands of DNA for subsequent sequence-specific particle assembly. This type of technology, where very small-scale matter can be directed to self assembly into programmed macrostructures in a highly-specific manner has the capability to be adapted for many next-generation applications in drug delivery, nanofabrication, biosensing, and microelectronics. A secondary technology was explored in this work involving the paired sequencing of antibody gene sequences with the aid of lithographically-patterned microarrays. This methodology represents a bridging of bottom-up fabrication methods of DNA and proteins with top-down optical fabrication techniques which is already finding increasing utility in applications such as vaccine discovery, diagnostics, and autoimmune research. Because of the versatile nature of the components of this research, it is the hope of the author that the techniques discovered and explored here provide support and inspiration for future research in the biotechnology field as well as in other fields which may benefit as well.Item Lithography variability driven cell characterization and layout optimization for manufacturability(2011-05) Ban, Yong Chan; Pan, David Z.; Abraham, Jacob; Touba, Nur; Lucas, Kevin; Orshansky, MichaelStandard cells are fundamental circuit building blocks designed at very early design stages. Nanometer standard cells are prone to lithography proximity and process variations. How to design robust cells under variations plays a crucial role in the overall circuit performance and yield. This dissertation studies five related research topics in design and manufacturing co-optimization in nanometer standard cells. First, a comprehensive sensitivity metric, which seamlessly incorporates effects from device criticality, lithographic proximity, and process variations, is proposed. The dissertation develops first-order models to compute these sensitivities, and perform robust poly and active layout optimization by minimizing the total delay sensitivity to reduce the delay under the nominal process condition and by minimizing the performance gap between the fastest and the slowest delay corners. Second, a new equivalent source/drain (S/D) contact resistance model, which accurately calculates contact resistances from contact area, contact position, and contact shape, is proposed. Based on the impact of contact resistance on the saturation current, robust S/D contact layout optimization by minimizing the lithography variation as well as by maximizing the saturation current without any leakage penalty is performed. Third, this dissertation describes the first layout decomposition methods of spacer-type self-aligned double pattering (SADP) lithography for complex 2D layouts. The favored type of SADP for complex logic interconnects is a two-mask approach using a core mask and a trim mask. This dissertation describes methods for automatically choosing and optimizing the manufacturability of base core mask patterns, generating assist core patterns, and optimizing trim mask patterns to accomplish high quality layout decomposition in SADP process. Fourth, a new cell characterization methodology, which considers a random (line-edge roughness) LER variation to estimate the device performance of a sub-45nm design, is presented. The thesis systematically analyzes the random LER by taking the impact on circuit performance due to LER variation into consideration and suggests the maximum tolerance of LER to minimize the performance degradation. Finally, this dissertation proposes a design aware LER model which claims that LER is highly related to the lithographic aerial image fidelity and the neighboring geometric proximity. With a new LER model, robust LER aware poly layout optimization to minimize the leakage power is performed.Item Modeling and defect analysis of step and flash imprint lithography and photolithography(2010-08) Chauhan, Siddharth; Bonnecaze, R. T. (Roger T.); Willson, C. G. (C. Grant), 1939-; Somervell, Mark H.; Mack, Chris A.; Edgar, Thomas F.In 1960's Gordon Moore predicted that the increase in the number of components in integrated circuits would exponentially decrease the relative manufacturing cost per component with time. The semiconductor industry has managed to keep that pace for nearly 45 years and one of the main contributors to this phenomenal improvement in technology is advancement in the field of lithography. However, the technical challenges ahead are severe and the future roadmap laid by the International Technology Roadmap for Semiconductors looks mostly red (i.e. no solution has been found to specific problem). There are efforts in the industry and academia directed toward development of newer, alternative lithographic techniques. Step and Flash Imprint Lithography (SFIL) has recently emerged as one of the most promising alternatives, capable of producing high resolution patterns. While it has numerous advantages over conventional photolithography, several engineering challenges must be overcome to eliminate defects due to the nature of contact imprinting if SFIL is to be a viable alternative technique for manufacturing tomorrow's integrated circuits. The complete filling of template features is vital in order for the SFIL imprint process to truly replicate the template features. The feature filling phenomena for SFIL was analyzed by studying diffusion of a gas, entrapped in the features, through liquid imprint resist. A simulation of the dynamics of feature filling for different pattern configurations and process conditions during the SFIL imprint step is presented. Simulations show that initial filling is pressure-controlled and very rapid; while the rest of the feature filling is diffusion-controlled, but fast enough that diffusion of entrapped gas is not a cause for non-filling of features. A theory describing pinning of an air-liquid interface at the feature edge of a template during the SFIL imprint step was developed, which shows that pinning is the main cause of non-filling of features. Pinning occurs when the pressure at the air-liquid interface reaches the pressure of the bulk liquid. At this condition, there is no pressure gradient or driving force to move the liquid and fill the feature. The effect of several parameters on pinning was examined. A SFIL process window was established and template modifications are proposed that minimize the pinning at the feature edge while still preventing any extrusion along the mesa (pattern containing area on the template) edge. Part of semiconductor manufacturing community believes that optical lithography has the capability to drive this industry further and is committed to the continuous improvement of current optical patterning approaches. Some of the major challenges with shrinking critical dimensions (CDs) in coming years are the control of line-edge roughness (LER) and other related defects. The current CDs are such that the presence or absence of even a single polymer molecule can have a considerable impact on LER. Therefore molecular level understanding of each step in the patterning process is required. Computer simulations are a cost-effective approach to explore the huge process space. Mesoscale modeling is one promising approach to simulations because it captures the stochastic phenomena at a molecular level within reasonable computational time. The modeling and simulation of the post-exposure bake (PEB) and the photoresist dissolution steps are presented. The new simulator enables efficient exploration of the statistical excursions that lead to LER and the formation of insoluble residues during the dissolution process. The relative contributions of the PEB and the dissolution step to the LER have also been examined in the low/high frequency domain. The simulations were also used to assess the commonly proposed measures to reduce LER. The goal of the work was to achieve quantification of the effect of changes in resist composition, developer concentration, and process variables on LER and the associated defectivity.Item Modeling and optimization to connect layout with silicon for nanoscale IC(2009-12) Shi, Xiaokang; Pan, David Z.With continuous and aggressive scaling in semiconductor technology, there is an increasing gap between design expectation and manufactured silicon data. Research on DFM (Design for manufacturability), MFD (Manufacturing for Design) and statistical analysis have been investigated in recent years to bridge design and manufacturing. Fundamentally, layout is the final output from the design side and the input to the manufacturing side. It is also the last chance to dramatically modify the design efficiently and economically. In this dissertation, I present the modeling and optimization work on bridging the gap between design expectation and reality, improving performance and enhancing manufacturing yield. I investigate several stages of semiconductor design development including manufacturing process, device, interconnect, and circuit level. In the manufacturing process stage, a novel inverse lithography technology (ILT) is proposed for sub-wavelength lithography resolution enhancement. New intuitive transformations enable the method to gradually converge to the optimal solution. A highly efficient method for gradient calculation is derived based on partially coherent optical models. Dose variation is considered within the ILO process with the min-max optimization method and the computation overhead on dose process variation could be omitted. The methods are implemented in state-of-the-art industrial 32nm lithography environment. After the work in the lithography process stage provides both mask optimization and post-layout silicon image simulation, my work on the first non-rectangular device modeling card extends the post-layout lithography to post-litho electrical calibration. Based on the lithography simulation results, the non-rectangular gate shapes are extracted and their effect is investigated by the proposed non-rectangular device modeling card and post-litho circuit simulation flow. This work is not only the first non-rectangular device modeling card but also compatible with industry standard device models and the parameter extraction flow. Interconnect plays a more critical role in the nanometer scale IC design especially because of its impact on delay. The scattering effect that occurs in nanoscale wires is modeled and different methods of wire sizing/shaping are discussed. Based on closed-form resistivity model for nanometer scale Cu interconnect, new interconnect delay model and wire sizing/shaping strategies are developed. Based on the advanced modeling of process, device and interconnect, circuit level investigation is focused on statistical timing analysis with a new latch delay model. For the first time, both combinational logic and clock distribution circuits are integrated together through statistical timing of latch outputs. This dissertation studies the new phenomena of nanometer scale IC design and manufacture. Starting from the designed layout, through modeling, optimization and simulation, the work moves ahead to the mask pattern and silicon image, calibrates electrical properties of devices as well as circuits. Through above process, we can better connect layout with silicon data to reach design and manufacturing closure.Item Nano-scale large area gap control for high throughput electrically induced micro-patterning(2007-12) Raines, Allen Lee, 1973-; Sreenivasan, S. V.Micro- and nano-scale patterning is essential to the fabrication of various kinds of devices including electronic circuits, optical devices, optoelectronic devices, thin film heads for magnetic storage, displays, etc. There are several current and emerging applications that specifically require regular arrays of repeating patterns such as gratings, posts, and holes. At the nano-scale, for replication using lithography techniques such as optical lithography and imprint lithography, the cost of making the master can be a significant portion of the fabrication cost, particularly if small batches of customized parts are required. High resolution patterning using electric fields allows the creation of micro- and nano-scale structures using low resolution masters. Most of the literature to date has focused on using high glass transition temperature polymers that need to be heated to induce the patterning process. While this allows the ability to use a wide variety of materials, it leads to poor throughput as it can take several minutes to complete the patterning of one device region. The patterning speed can be increased by using photocurable, low viscosity monomers instead of high glass transition temperature polymers. Process control requires a tool that can control the parallelism of the gap between a conductive wafer and template to the nanometer level over large areas. The tool must have high resolution orientation and position control and high apparent stiffness to prevent the electric field from pulling the template and wafer together. In this research, high stiffness mechanism designs were investigated first. Such designs proved impractical, with travel, stiffness, and maximum side load requirements difficult or extremely expensive to meet. Therefore, a novel precision machine concept was explored. A parallel mechanism that is simultaneously actuated by piezo actuators and by voice coils was studied. Feedforward compensation of the applied electric force using voice coils was used to reduce the need for a stiff mechanism. The result was the Hybrid Active Gap Tool (HAGT), a 3-RPS parallel mechanism which has the ability to significantly enhance the quality of electrically induced patterning. Performance of the Hybrid Active Gap Tool was validated using a set of gap control experiments. The new design and control system resulted in very high precision orientation alignment needed for gap control. Without voice coil compensation, the tool has a stiffness of less than 3N/µm . With voice coil compensation, the apparent stiffness of the tool varies from a minvi imum of 30N/µm up to nearly infinite stiffness and into negative stiffness if overcompensation is intentionally used. Voice coil compensation allows the tool to meet the stringent performance requirements of the patterning process without the need for a high stiffness mechanism. Gaps as small as 400nm were maintained with the electric field applied and the gap changed by less than 5nm from the nominal 400nm during the process. Smaller gaps can be achieved with improvements in template mesa height calibration and better understanding of piezo actuated mechanism designs.Item Nanofabrication via directed assembly: a computational study of dynamics, design & limits(2016-08) Arshad, Talha Ali; Bonnecaze, R. T. (Roger T.); Ellison, Christopher J.; Ganesan, Venkat; Sreenivasan, S. V.; Willson, Carlton G.Three early-stage techniques, for the fabrication of metallic nanostructures, creation of controlled topography in polymer films and precise deposition of nanowires are studied. Mathematical models and computational simulations clarify how interplay of multiple physical processes drives dynamics, provide a rational approach to selecting process parameters targeting specific structures efficiently and identify limits of throughput and resolution for each technique. A topographically patterned membrane resting on a film of nanoparticles suspended in a solvent promotes non-uniform evaporation, driving convection which accumulates particles in regions where the template is thin. Left behind is a deposit of particles the dimensions of which can be controlled through template thickness and topography as well as film thickness and concentration. Particle distribution is shown to be a competition between convection and diffusion represented by the Peclet number. Analytical models yield predictive expressions for bounds within which deposit dimensions and drying time lie. Ambient evaporation is shown to drive convection strong enough to accumulate particles 10 nm in diameter. Features up to 1 µm high with 10 nm residual layers can be deposited in < 3 minutes, making this a promising approach for continuous, single-step deposition of metallic nanostructures on flexible substrates. Selective exposure of a polystyrene film to UV radiation has been shown to result in non-uniform surface energy which drives convection on thermal annealing, forming topography. Film dynamics are shown to be a product of interplay between Marangoni convection, capillary dissipation and diffusion. At short times, secondary peaks form at double the pattern density of the mask, while at long times pattern periodicity follows the mask. Increased temperature, larger surface tension differentials and thick films result in faster dynamics and larger features. Electric fields in conjunction with fluid flow can be used to position semi-conducting nanowires or nanotubes at precise locations on a substrate. Nanowires are captured successfully if they arrive within a region next to the substrate where dielectrophoresis dominates hydrodynamics. Successful assembly is predicated upon a favorable balance of hydrodynamics, dielectrophoresis and diffusion, represented by two dimensionless groups. Nanowires down to 20 nm in length can be assembled successfully.