Browsing by Subject "Flexible electronics"
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Item Carbon nanotube thin film transistor on flexible substrate and its applications as switches in a phase shifter for a flexible phased-array antenna(2010-12) Pham, Daniel Thanh Khac; Chen, Ray T.; Akinwande, Deji; Bank, Seth; Chen, Maggie; Ho, Paul; Subbaraman, HarishIn this dissertation, a carbon nanotube thin-film transistor is fabricated on a flexible substrate. Combined printing and stamping techniques are used for the fabrication. An ink-jet printing technique is used to form the gate, source, and drain electrodes as well as the dielectric layer. A self aligned carbon nanotube (CNT) thin film is formed by using a new modified dip coat technique before being transferred to the device substrate. This novel modified dip-coat technique utilizes the capillary effect of a liquid solution rising between gaps to coat CNT solution on a large area of the substrate while consuming minimal CNT solution. Several key solutions are addressed to solve the fabrication problems. (1) The source/drain contact with the CNT channel is developed by using droplets of silver ink printed on the source/drain areas prior to applying CNT thin. The wet silver ink droplets allow the silver to "wet" the CNT thin-film area and enable good contact with the source and drain contact after annealing. (2) A passivation layer to protect the device channel is developed by bonding a thin Kapton film on top of the device channel. This thin Kapton film is also used as the media for transferring the aligned CNT thin-film on the device substrate. Using this technique, printing the passivation layer can be avoided, and it prevents the inter-diffusion of the liquid dielectric into the CNT porous thin-film. (3) A simple and cost effective technique to form multilayer metal interconnections on flexible substrate is developed and demonstrated. Contact vias are formed on the second substrate prior bonding on the first substrate. Ink-jet printing is used to fill the silver ink into the via structure. The printed silver ink penetrates through the vias to contact with the contact pads on the on the bottom layer, followed by an anneal process. High drain current of 0.476mA was obtained when V[subscript G]= -3V and source-drain voltage (V[subscript DS]) was -1.5V. A bending test was performed on the CNT TFT showing less than a 10% variation in performance. A bending test was also performed on via structures, which yielded less than a 5% change in resistance. The developed CNT TFT is used to form a switch in a phase shifter for a flexible phased-array antenna (PAA). Four element 1-dimensional and 2-dimensional phased-array antennae are fabricated and characterized. Multilayer metal interconnects were used to make a complete PAA system. For a 2-bit 1x4 PAA system, by controlling the ON/OFF states of the transistors, beam steering of a 5.3GHz signal from 0° to -27° has been demonstrated. The antenna system also shows good stability and tolerance under different bending radii of curvature. A 2-bit 2x2 PAA system was also fabricated and demonstrated. Two dimensional beam steering of a 5.2GHz signal at an angle of [theta]=20.7° and [phi]=45° has been demonstrated. The total efficiency of the 1-dimensional and 2-dimensional PAA systems are 42% and 46%, respectively.Item Device physics and device mechanics for flexible MoS2 thin film transistors(2015-08) Chang, Ph. D., Hsiao-Yu; Akinwande, Deji; Lu, Nanshu; Lee, Jack; Lai, Keji; Dodabalapur, AnanthWhile there has been increasing studies of MoS2 and other two-dimensional (2D) semiconducting dichalcogenides on hard conventional substrates, experimental or analytical studies on flexible substrates has been very limited so far, even though these 2D crystals are understood to have greater prospects for flexible smart systems. In the first part, we report detailed studies of MoS2 transistors on industrial plastic sheets. Failure mechanisms under strain are studied with bending test and stretching test. Experimental investigation identifies that crack formation in the dielectric and the buckling delamination in MoS2 are responsible for the degradation of the device performance. Several approaches to improve device flexibility were discussed. In the second part, electronic transport properties in multilayer MoS2 are investigated with Y-function method. By combining experiments and analysis, we show that the Y-function method offers a robust route for evaluating the low-field mobility, threshold voltage and contact resistance even when the contact is a Schottky-barrier as is common in two-dimensional transistors. In addition, an independent transfer length method (TLM) evaluation corroborates the modified Y-function analysis. The last part, we demonstrate the first RF performance for transferred CVD-grown MoS2 FETs on the flexible substrate. Our result suggests that the large-area CVD-grown MoS2 provides a practical route to realize low-power, high speed electronics circuit applications in the future.Item Graphene field effect transistors for high performance flexible nanoelectronics(2014-05) Lee, Jongho, active 21st century; Akinwande, DejiDespite the widespread interest in graphene electronics over the last decade, high-performance graphene field-effect transistors (GFETs) on flexible substrates have been rarely achieved, even though this atomic sheet is widely understood to have greater prospects for flexible electronic systems. In this work, we investigate the realization of high-performance graphene field effect transistors implemented on flexible plastic substrates. The optimum device structure for high-mobility and high-bendability is suggested with experimental comparison among diverse structures including top-gate GFETs (TG-GFETs), single/multi-finger embedded-gate GFETs with high-k dielectrics (EG-highk/GFETs), and embedded-gate GFETs with hexagonal boron nitride (h-BN) dielectrics. Flexible graphene transistors with high-k dielectric afforded intrinsic gain, maximum carrier mobility of 8,000 cm²/V·s, and importantly 32 GHz cut-off frequency. Mechanical studies reveal robust transistor performance under repeated bending down to 0.7 mm bending radius whose tensile strain corresponds to 8.6%. Passivation techniques, with robust mechanical and chemical protection in order to operate under harsh environments, for embedded-gate structures are also covered. The integration of functional coatings such as highly hydrophobic fluoropolymers combined with the self-passivation properties of the polyimide substrate provides water-resistant protection without compromising flexibility, which is an important advancement for the realization of future robust flexible systems based on graphene.Item Highly conductive, nanoparticulate thick films processed at low processing temperatures(2012-08) Nahar, Manuj, 1985-; Kovar, Desiderio; Ferreira, Paulo J.; Becker, Michael F.; Keto, John W.; Bourell, David L.Applications such as device interconnects require thick, patterned films that are currently produced by screen printing pastes consisting of metallic particles and subsequently sintering the films. For Ag films, achieving adequate electrical conductivity requires sintering temperatures in excess of 700˚C. New applications require highly conductive films that can be processed at lower processing temperatures. Although sintering temperatures have been reduced by utilizing finer nanoparticles (NPs) in place of conventional micron-size particles (MPs), realization of theoretically achievable sintering kinetics is yet to be achieved. The major factors that inhibit NP sintering are 1) the presence of organic molecules on the NP surfaces, 2) the dominance of the non-densifying surface diffusion over grain boundary or lattice diffusion 3) agglomeration of NPs, and 4) low initial density of the NPs. Here, we report a film fabrication technique that is capable of eliminating these deleterious factors and produces near fully dense Ag films that exhibit an order of magnitude higher conductivity when compared to other film fabrication techniques at processing temperatures of 150 – 250 °C. The observed results establish the benefits of NP diffusion kinetics to be far more profound when the deleterious factors to sintering are eliminated. The sintering behavior exhibits two distinct temperature regimes – one above 150 ᵒC where grain boundary diffusion-dominated densification is dominant and one below 100 ᵒC where surface diffusion-dominated coarsening is dominant. An analytical model is developed by fitting the experimental data to the existing models of simultaneous densification and grain growth, and combining this model with existing models of the dependence of conductivity on grain boundary scattering and pore scattering. The combined model successfully describes the evolution of density, grain size and conductivity of nanoparticulate films as a function of annealing treatment, with reasonable accuracy. The model was also used to evaluate the effect of initial NP size and initial relative density of films on the final sintered properties and conductivity of films.Item Silicon nanomembrane for high performance conformal photonic devices(2013-12) Xu, Xiaochuan; Chen, Ray T.Inorganic material based electronics and photonics on unconventional substrates have shown tremendous unprecedented applications, especially in areas that traditional wafer based electronics and photonics are unable to cover. These areas range from flexible and conformal consumer products to biocompatible medical devices. This thesis presents the research on single crystal silicon nanomembrane photonics on different substrates, especially flexible substrates. A transfer method has been developed to transfer silicon nanomembrane defect-freely onto glass and flexible polyimide substrates. Using this method, intricate single crystal silicon nanomembrane device, such as photonic crystal microcavity, has been transferred onto flexible substrates. To test the device, subwavelength grating couplers are designed and implemented to couple light in and out of the transferred waveguides with high coupling efficiency. The cavity shows a quality factor ~ 9000 with water cladding and ~30000 with glycerol cladding, which is comparable to the same cavity demonstrated on silicon-on-insulator platform, indicating the high quality of the transferred silicon nanomembrane. The device could be bended to a radius less than 15 mm. The experiments show that the resonant wavelength shifts to longer wavelength under tensile stress, while it shifts to shorter wavelength under compressive stress. The sensitivity of the cavity is ~70 nm/RIU, which is independent of bending radius. This demonstration opens vast possibilities for a whole new range of high performance, light-weight and conformal silicon photonic devices. The techniques and devices (e.g. wafer bonding, stamp printing, subwavelength grating couplers, and modulator) generated in the research can also be beneficial for other research fields.Item Thin-film transistor circuits based on inkjet printed single-walled carbon nanotubes and zinc tin oxide(2015-12) Kim, Bongjun; Dodabalapur, Ananth, 1963-; Akinwande, Deji; Chen, Ray; Lee, Jack; Viswanathan, T. R.; Yu, GuihuaRecently, various novel functional materials and low-cost device fabrication techniques have emerged in the field of thin-film electronics. Active semiconductors in the form of thin-films are one of the critical components in thin-film transistors (TFTs) to achieve high-performance large-area electronics. Semiconducting single-walled carbon nanotubes (SWCNTs) and amorphous zinc tin oxide (ZTO) are considered to be some of the most promising semiconductors for TFTs due to their advantages such as high electrical performance, air-stability, and optical transparency. In this dissertation, SWCNTs and ZTO are employed as p-channel/ambipolar and n-channel semiconductors in TFTs, respectively, and integrated into various circuits through use of the cost-effective inkjet printing technique. High-performance p-channel TFTs are demonstrated by using single-pass inkjet printing of SWCNTs. Dense uniform networks of SWCNTs are formed in the channel of TFTs with single-pass printing after application of UV O3 treatment on the dielectric surface for suitable surface energy modification. By employing these SWCNT TFTs for p-TFTs along with ZTO n-TFTs, high-speed complementary circuits are demonstrated with low power consumption. The material combination of high-performance inkjet printed n- and p-channel semiconductors results in the fastest ring oscillators (ROSCs) among previously reported ROSCs where printed semiconductors were utilized. Furthermore, adding additional top-gate dielectric and top-gate electrode layers on top of the ROSCs can impart new functionalities that can be used to control the oscillation frequency of the ROSCs linearly with applied top-gate bias. Various basic circuits are also demonstrated by using inkjet printed ambipolar semiconductors. SWCNTs and ZTO, employed as p- and n-channel semiconductors for individual TFTs, turn into an ambipolar semiconductor when they are printed in a bilayer heterostructure. The bilayer ambipolar TFTs show high electron and hole mobilities in air, and ROSCs based on the ambipolar TFTs show the fastest oscillation frequency among the best reported ambipolar TFT-based ROSCs. Ambipolar SWCNT circuits are also demonstrated by encapsulating SWCNTs with aluminum oxide (Al2O3) layer deposited by atomic layer deposition (ALD). These ambipolar circuits are realized on flexible plastic substrates with inkjet printed electrodes, and show high operational and environmental stability.Item Toward roll-to-roll transfer of large-scale graphene for flexible electronics fabrication(2013-12) Xin, Hao; Li, Wei, doctor of mechanical engineeringGraphene is a promising material for flexible electronics due to its extraordinary electrical, mechanical, and optical properties. One of the biggest challenges today is to transfer large-scale graphene sheet to flexible substrates with minimal quality degradation. In this thesis, a bilayer polymer support for graphene transfer is proposed. Liquid PDMS (polydimethylsiloxane) is first coated on graphene to conform to its surface morphology. A flexible plastic substrate is then pressed on PDMS as a durable support. After PDMS is cured, electrochemical delamination is used to separate graphene from the copper foil. Due to the extremely low work of adhesion between graphene and PDMS, the graphene film on PDMS can be further transferred onto silicon wafer or other flexible substrates by simple adhesion. An added benefit of the PDMS layer is its strain isolation effect, which could protect graphene-based devices from breaking under external loads applied on the flexible substrate. The strain isolation effect of PDMS is verified with an analytical model and finite element analysis. The design of a prototype roll-to-roll graphene transfer machine is also presented.