Cost-effective test at system-level



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As modern digital hardware/software systems become more complex, the testing of these systems through their entire life-cycle including design verification test, production test, and field test, becomes a severe problem. In addition, the system's own characteristics make it difficult to apply componentlevel test methods for system-level testing. The goal of this dissertation is to provide help in obtaining a cost-effective test model that can be used at systemlevel and with testability at field-level. Equation-based method can be used in finding an appropriate test method, but to use this method, all the cost-related equations have to be developed, which is a very difficult and time-consuming process. At the initial design stage, some parameters are not available, and many are not accurate. A new test selection method using multi-attribute utility analysis (MAUA) is suggested in this dissertation. This method can greatly reduce time in developing model. This dissertation applies MAUA method to chip-level test selection to determine its usefulness, and goes on to apply it to system-level test selection. The results show that the applications of this method in the test selection of chip-level and single-board computer (SBC) point towards the best test method with much less effort compared to when traditional cost equations are developed.