RSA in hardware

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dc.contributor.advisorAbraham, Jacob A.en
dc.contributor.committeeMemberMcDermott, Marken
dc.creatorGillmore, Brooks Colinen
dc.date.accessioned2011-02-21T20:04:19Zen
dc.date.accessioned2011-02-21T20:04:29Zen
dc.date.accessioned2017-05-11T22:21:28Z
dc.date.available2011-02-21T20:04:19Zen
dc.date.available2011-02-21T20:04:29Zen
dc.date.available2017-05-11T22:21:28Z
dc.date.issued2010-12en
dc.date.submittedDecember 2010en
dc.date.updated2011-02-21T20:04:29Zen
dc.descriptiontexten
dc.description.abstractThis report presents the RSA encryption and decryption schemes and discusses several methods for expediting the computations required, specifically the modular exponentiation operation that is required for RSA. A hardware implementation of the CIOS (Coarsely Integrated Operand Scanning) algorithm for modular multiplication is attempted on a XILINX Spartan3 FPGA in the TLL-5000 development platform used at the University of Texas at Austin. The development of the hardware is discussed in detail and some Verilog source code is provided for an implementation of modular multiplication. Some source code is also provided for an RSA executable to run on the TLL-6219 ARM-based development platform, to be used to generate test vectors.en
dc.description.departmentElectrical and Computer Engineeringen
dc.format.mimetypeapplication/pdfen
dc.identifier.urihttp://hdl.handle.net/2152/ETD-UT-2010-12-2430en
dc.language.isoengen
dc.subjectMontgomery multiplieren
dc.subjectCryptographyen
dc.subjectHardwareen
dc.titleRSA in hardwareen
dc.type.genrethesisen

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