An ASIC implementation of the two-dimensional Discrete Cosine Transform
dc.creator | Chen, Feng | |
dc.date.accessioned | 2016-11-14T23:11:18Z | |
dc.date.available | 2011-02-19T01:03:02Z | |
dc.date.available | 2016-11-14T23:11:18Z | |
dc.date.issued | 1996-08 | |
dc.degree.department | Electrical and Computer Engineering | en_US |
dc.description.abstract | Not available | |
dc.format.mimetype | application/pdf | |
dc.identifier.uri | http://hdl.handle.net/2346/22536 | en_US |
dc.language.iso | eng | |
dc.publisher | Texas Tech University | en_US |
dc.rights.availability | Unrestricted. | |
dc.subject | Application specific integrated circuits | en_US |
dc.subject | Image compression -- Data processing | en_US |
dc.subject | Video compression | en_US |
dc.subject | Signal processing | en_US |
dc.title | An ASIC implementation of the two-dimensional Discrete Cosine Transform | |
dc.type | Thesis |