Addressing the memory bottleneck in packet processing systems

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dc.contributor.advisorVin, Harrick M.en
dc.creatorMudigonda, Jayaramen
dc.date.accessioned2008-08-28T22:42:23Zen
dc.date.accessioned2017-05-11T22:17:07Z
dc.date.available2008-08-28T22:42:23Zen
dc.date.available2017-05-11T22:17:07Z
dc.date.issued2005en
dc.descriptiontexten
dc.description.departmentComputer Sciencesen
dc.format.mediumelectronicen
dc.identifierb61126135en
dc.identifier.oclc71004382en
dc.identifier.urihttp://hdl.handle.net/2152/2307en
dc.language.isoengen
dc.rightsCopyright is held by the author. Presentation of this material on the Libraries' web site by University Libraries, The University of Texas at Austin was made possible under a limited license grant from the author who has retained all copyrights in the works.en
dc.subject.lcshPacket switching (Data transmission)en
dc.subject.lcshComputer network protocolsen
dc.titleAddressing the memory bottleneck in packet processing systemsen
dc.type.genreThesisen

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