Self-calibrating random access logarithmic pixel for on chip camera
| dc.contributor | Karsilayan, Aydin Ilker | |
| dc.creator | Hong, Augustin Jinwoo | |
| dc.date.accessioned | 2005-08-29T14:38:52Z | |
| dc.date.accessioned | 2017-04-07T19:50:08Z | |
| dc.date.available | 2005-08-29T14:38:52Z | |
| dc.date.available | 2017-04-07T19:50:08Z | |
| dc.date.created | 2003-05 | |
| dc.date.issued | 2005-08-29 | |
| dc.description.abstract | CMOS active pixel sensors (APS) have shown competitive performance with charge-coupled device (CCD) and offer many advantages in cost, system power reduction and on-chip integration of VLSI electronics. Among CMOS image sensors, sensors with logarithmic pixels are particularly applicable for outdoor environment where the light intensity varies over a wide range. They are also randomly accessible in both time and space. A major drawback comes from process variations during fabrication. This gives rise to a considerable fixed pattern noise (FPN) which deteriorates the image quality. In this thesis, a technique that greatly reduces FPN using on-chip calibration is introduced. An image sensor that consists of 64x64 active pixels has been designed, fabricated and tested. Pixel pitch is 18um x 19.2um? and is fabricated in a 0.5-um? CMOS process. The proposed pixel circuit considerably reduces the FPN as predicted in theoretical analysis. The measured FPN value is 2.29% of output voltage swing and column-wise FPN is 1.49% of mean output voltage over each column. | |
| dc.identifier.uri | http://hdl.handle.net/1969.1/2328 | |
| dc.language.iso | en_US | |
| dc.publisher | Texas A&M University | |
| dc.subject | logarithmic pixel | |
| dc.subject | self-calibration | |
| dc.title | Self-calibrating random access logarithmic pixel for on chip camera | |
| dc.type | Book | |
| dc.type | Thesis |