Fabrication, Characterization And Hall Mobility Analysis Of MOS Devices With Low-k And High-k Dielectric Materials

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dc.contributorAgrawal, Rakshiten_US
dc.date.accessioned2007-08-23T01:56:31Z
dc.date.accessioned2011-08-24T21:40:18Z
dc.date.available2007-08-23T01:56:31Z
dc.date.available2011-08-24T21:40:18Z
dc.date.issued2007-08-23T01:56:31Z
dc.date.submittedDecember 2006en_US
dc.description.abstractScaling of MOSFETS has led to leakage current problems in SiO2 dielectric based MOSFETS. This has led to the introduction of high-k dielectric materials which can afford greater physical thickness and achieve the same capacitance with lesser equivalent oxide thickness. But the high-k devices have certain limitations like channel mobility degradation. Mobility degradation in high-k MISFETS is discussed in this work using Hall measurements. The MOS devices were fabricated with SiO2 and HfSiO, on p-type silicon substrate. The fabrication process flow used for both type of MOS devices is explained. Characterization and analysis was performed for the determination of various parameters related to these devices like dielectric thickness. Hall mobility measurements were performed on the specially designed multi-drain Hall bars for different gate biases in low magnetic field regime. Higher Hall mobility was observed in the SiO2 based devices than HfSiO based devices.en_US
dc.identifier.urihttp://hdl.handle.net/10106/341
dc.language.isoENen_US
dc.publisherElectrical Engineeringen_US
dc.titleFabrication, Characterization And Hall Mobility Analysis Of MOS Devices With Low-k And High-k Dielectric Materialsen_US
dc.typeM.S.en_US

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