Test optimization using software reconfigurable device interface boards

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dc.contributor.committeeChairGale, Richard O.
dc.contributor.committeeMemberDallas, Timothy E. J.
dc.creatorMoore, Rachel A.
dc.date.accessioned2016-11-14T23:11:31Z
dc.date.available2011-01-11T15:56:28Z
dc.date.available2016-11-14T23:11:31Z
dc.date.issued2010-12
dc.degree.departmentElectrical Engineering
dc.description.abstractThe characterization of semiconductor integrated circuits using standard bench equipment is optimized using software reconfigurable interface boards. A field programmable gate array (FPGA) provides reconfigurable virtual instruments and traditional instrument control and signal routing via a matrix relay board. An FPGA including a power PC processor core is programmable in C/C++ with the automated test procedure while maintaining a fixed logic for the gate array used to support a minimal amount of external circuitry needed to provide testing resources. The test capabilities of a traditional bench can be expanded to include protocol aware testing and supplemental test circuitry implementation including over temperature testing.
dc.format.mimetypeapplication/pdf
dc.identifier.urihttp://hdl.handle.net/2346/ETD-TTU-2010-12-1155
dc.language.isoeng
dc.rights.availabilityUnrestricted.
dc.subjectField-programmable gate array (FPGA)
dc.subjectSemiconductor device testing
dc.subjectSoftware reconfigurable
dc.subjectBench testing
dc.titleTest optimization using software reconfigurable device interface boards
dc.typeThesis

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