VLSI implementation of digital adaptive nonlinear filter for image processing
| dc.creator | Huang, Xiaofan | |
| dc.date.accessioned | 2016-11-14T23:10:53Z | |
| dc.date.available | 2011-02-19T00:42:57Z | |
| dc.date.available | 2016-11-14T23:10:53Z | |
| dc.date.issued | 1996-12 | |
| dc.degree.department | Electrical and Computer Engineering | en_US |
| dc.description.abstract | Real time digital image and video signal processing have developed rapidly in the past few decades. Nonlinear fikering is an important tool in this field. Order statistics filter is one of the most popular families of nonlinear fikers. It is applied universally in image enhancement, image edge detection, code error detection and correction. An VLSI implementation for real time image filtering is presented in this thesis. To achieve good filtering effects, the designed chip combines adaptive two-dimensional order statistics filters. The adaptive filter can remove high density impulsive noise as well as the combination of Gaussian noise and impulsive noise. It provides good compromise between suppression noises and image details preservation. This chip is based on two levels Bacher's odd/even sorting network. To achieve high throughput, the VLSI implemented employs running window, highly pipelining structure and two-phase non-overlapping clocking strategy. Clock rate up to 50 MHz can be achieved and the throughput is 50/8 M samples per second for 8-bit signal. Implementation was optimized by reducing area expense and latency time. | |
| dc.format.mimetype | application/pdf | |
| dc.identifier.uri | http://hdl.handle.net/2346/22031 | en_US |
| dc.language.iso | eng | |
| dc.publisher | Texas Tech University | en_US |
| dc.rights.availability | Unrestricted. | |
| dc.subject | Integrated circuits | en_US |
| dc.subject | Adaptaive filters | en_US |
| dc.subject | Image processing | en_US |
| dc.title | VLSI implementation of digital adaptive nonlinear filter for image processing | |
| dc.type | Thesis |