Low power scan testing and test data compression
| dc.contributor.advisor | Touba, Nur A. | en |
| dc.creator | Lee, Jinkyu | en |
| dc.date.accessioned | 2008-08-28T22:55:50Z | en |
| dc.date.available | 2008-08-28T22:55:50Z | en |
| dc.date.issued | 2006 | en |
| dc.description | text | en |
| dc.description.abstract | As the size and complexity of systems-on-a-chips (SOCs) continue to grow, test data volume and test power consumption have increased dramatically. A large amount of test data causes long test time and a large memory requirement on the tester. Large power consumption during test can result in high packaging cost and Vdd drop/ground bounce problems. In this dissertation, five techniques for reducing test data volume, test power consumption, or both, are proposed. The first is a new encoding algorithm that can be used in conjunction with any LFSR reseeding scheme to significantly reduce power consumption during test. The second is a scheme for inserting a linear feedforward network composed of XOR gates in the scan chains to reduce power consumption during test by reducing the number of scan shift cycles. The third is a built-in self-test (BIST) scheme that both reduces overhead for detecting random-patternresistant (r.p.r.) faults as well as reduces power consumption during test. The fourth is a technique for improving the compression achieved with any linear decompressor by adding a small non-linear decoder that exploits bit. | |
| dc.description.department | Electrical and Computer Engineering | en |
| dc.format.medium | electronic | en |
| dc.identifier | b6481404x | en |
| dc.identifier.oclc | 82369664 | en |
| dc.identifier.uri | http://hdl.handle.net/2152/2568 | en |
| dc.language.iso | eng | en |
| dc.rights | Copyright is held by the author. Presentation of this material on the Libraries' web site by University Libraries, The University of Texas at Austin was made possible under a limited license grant from the author who has retained all copyrights in the works. | en |
| dc.subject.lcsh | Systems on a chip--Testing | en |
| dc.subject.lcsh | Data compression (Computer science)--Testing | en |
| dc.title | Low power scan testing and test data compression | en |
| dc.type.genre | Thesis | en |