Improved algorithms and hardware designs for division by convergence

dc.contributor.advisorSwartzlander, Earl E.en
dc.creatorKong, Inwooken
dc.date.accessioned2010-06-21T20:43:36Zen
dc.date.accessioned2017-05-11T22:20:01Z
dc.date.available2010-06-21T20:43:36Zen
dc.date.available2017-05-11T22:20:01Z
dc.date.issued2009-12en
dc.descriptiontexten
dc.description.abstractThis dissertation focuses on improving the division-by-convergence algorithm. While the division by convergence algorithm has many advantages, it has some drawbacks, such as a need for extra bits in the multiplier and a large ROM table for the initial approximation. To mitigate these problems, two new methods are proposed here. In addition, the research scope is extended to seek an efficient architecture for implementing a divider with Quantum-dot Cellular Automata (QCA), an emerging technology. For the first proposed approach, a new rounding method to reduce the required precision of the multiplier for division by convergence is presented. It allows twice the error tolerance of conventional methods and inclusive error bounds. The proposed method further reduces the required precision of the multiplier by considering the asymmetric error bounds of Goldschmidt dividers. The second proposed approach is a method to increase the speed of convergence for Goldschmidt division using simple logic circuits. The proposed method achieves nearly cubic convergence. It reduces the logic complexity and delay by using an approximate squarer with a simple logic implementation and a redundant binary Booth recoder. Finally, a new architecture for division-by-convergence in QCA is proposed. State machines for QCA often have synchronization problems due to the long wire delays. To resolve this problem, a data tag method is proposed. It also increases the throughput significantly since multiple division computations can be performed in a time skewed manner using one iterative divider.en
dc.description.departmentElectrical and Computer Engineeringen
dc.format.mediumelectronicen
dc.identifier.urihttp://hdl.handle.net/2152/7844en
dc.language.isoengen
dc.rightsCopyright is held by the author. Presentation of this material on the Libraries' web site by University Libraries, The University of Texas at Austin was made possible under a limited license grant from the author who has retained all copyrights in the works.en
dc.subjectDivision-by-convergenceen
dc.subjectAlgorithmsen
dc.subjectQuantum-dot Cellular Automataen
dc.subjectSynchronizationen
dc.subjectGoldschmidt divisionen
dc.titleImproved algorithms and hardware designs for division by convergenceen

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