An evaluation of CoWare Inc.'s Processor Designer tool suite for the design of embedded processors.

The goal of this thesis is to evaluate the Processor Designer family of tools from CoWare, Inc. Processor Designer uses the L.I.S.A. 2.0 (Language for Instruction Set Architecture) language. The evaluation is being performed to determine the suitability of the toolset for incorporation into a classroom environment and for the use in developing replacements for legacy processors. The main focus will be on the ease of use of the tools. This includes exploring how steep of a learning curve is involved with this new processor designer language and how well the tools have been documented. The limitations of the tools will also be explored, as far as what can and cannot be done in the language. The thesis is also intended to provide a tutorial introduction to the CoWare Inc. tool suite for future students.