Browsing by Subject "receiver"
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Item Bluetooth/WLAN receiver design methodology and IC implementations(Texas A&M University, 2004-09-30) Emira, Ahmed Ahmed EladawyEmerging technologies such as Bluetooth and 802.11b (Wi-Fi) have fuelled the growth of the short-range communication industry. Bluetooth, the leading WPAN (wireless personal area network) technology, was designed primarily for cable replacement applications. The first generation Bluetooth products are focused on providing low-cost radio connections among personal electronic devices. In the WLAN (wireless local area network) arena, Wi-Fi appears to be the superior product. Wi-Fi is designed for high speed internet access, with higher radio power and longer distances. Both technologies use the same 2.4GHz ISM band. The differences between Bluetooth and Wi-Fi standard features lead to a natural partitioning of applications. Nowadays, many electronics devices such as laptops and PDAs, support both Bluetooth and Wi-Fi standards to cover a wider range of applications. The cost of supporting both standards, however, is a major concern. Therefore, a dual-mode transceiver is essential to keep the size and cost of such system transceivers at a minimum. A fully integrated low-IF Bluetooth receiver is designed and implemented in a low cost, main stream 0.35um CMOS technology. The system includes the RF front end, frequency synthesizer and baseband blocks. It has -82dBm sensitivity and draws 65mA current. This project involved 6 Ph.D. students and I was in charge of the design of the channel selection complex filter is designed. In the Bluetooth transmitter, a frequency modulator with fine frequency steps is needed to generate the GFSK signal that has +/-160kHz frequency deviation. A low power ROM-less direct digital frequency synthesizer (DDFS) is designed to implement the frequency modulation. The DDFS can be used for any frequency or phase modulation communication systems that require fast frequency switching with fine frequency steps. Another contribution is the implementation of a dual-mode 802.11b/Bluetooth receiver in IBM 0.25um BiCMOS process. Direct-conversion architecture was used for both standards to achieve maximum level of integration and block sharing. I was honored to lead the efforts of 7 Ph.D. students in this project. I was responsible for system level design as well as the design of the variable gain amplifier. The receiver chip consumes 45.6/41.3mA and the sensitivity is -86/-91dBm.Item CMOS Integrated Circuit Design for Ultra-Wideband Transmitters and Receivers(2010-10-12) Xu, RuiUltra-wideband technology (UWB) has received tremendous attention since the FCC license release in 2002, which expedited the research and development of UWB technologies on consumer products. The applications of UWB range from ground penetrating radar, distance sensor, through wall radar to high speed, short distance communications. The CMOS integrated circuit is an attractive, low cost approach for implementing UWB technology. The improving cut-off frequency of the transistor in CMOS process makes the CMOS circuit capable of handling signal at multi-giga herz. However, some design challenges still remain to be solved. Unlike regular narrow band signal, the UWB signal is discrete pulse instead of continuous wave (CW), which results in the occupancy of wide frequency range. This demands that UWB front-end circuits deliver both time domain and frequency domain signal processing over broad bandwidth. Witnessing these technique challenges, this dissertation aims at designing novel, high performance components for UWB signal generation, down-conversion, as well as accurate timing control using low cost CMOS technology. We proposed, designed and fabricated a carrier based UWB transmitter to facilitate the discrete feature of the UWB signal. The transmitter employs novel twostage -switching to generate carrier based UWB signal. The structure not only minimizes the current consumption but also eliminates the use of a UWB power amplifier. The fabricated transmitter is capable of delivering tunable UWB signal over the complete 3.1GHz -10.6GHz UWB band. By applying the similar two-stage switching approach, we were able to implement a novel switched-LNA based UWB sampling receiver frontend. The proposed front-end has significantly lower power consumption compared to previously published design while keep relatively high gain and low noise at the same time. The designed sampling mixer shows unprecedented performance of 9-12dB voltage conversion gain, 16-25dB noise figure, and power consumption of only 21.6mW(with buffer) and 11.7mW(without buffer) across dc to 3.5GHz with 100M-Hz sampling frequency. The implementation of a precise delay generator is also presented in the dissertation. It relies on an external reference clock to provide accurate timing against process, supply voltage and temperature variation through a negative feedback loop. The delay generator prototype has been verified having digital programmability and tunable delay step resolution. The relative delay shift from desired value is limited to within 0.2%.Item Digitally Assisted Multi-Channel Receivers(2011-10-21) Pentakota, Krishna Anand Santosh SpikanthThis work presents a data estimation scheme for wide band multi-channel charge sampling receivers with sinc filter banks together with a complete system calibration and synchronization algorithm for the receiver. A unified model has been defined for the receiver containing all first order mismatches, offsets and imperfections and a technique based on least mean squares algorithm is employed to track these errors. The performance of this technique under noisy channel conditions has been verified. The sinc filter bank is compared with the conventional analog filter banks and it is shown that the sinc filter banks have very low computational complexity in data estimation Nextly, analytical tools for the design of clock-jitter tolerant multi-channel filterbank receivers have been developed. Clock-jitter is one of the most fundamental obstacles for the future generation of wideband receivers. Additionally all the trade-offs and specifications of a design example for a multi-channel receiver that can process a 5 GHz baseband signal with 40 dB of signal-to-noise-ratio (SNR) using sampling clocks that can tolerate up to 5 ps of clock-jitter standard deviation are presented. A novel bandwidth optimization technique has been presented. As a part of it the bandwidth of the filters present in each path is optimized thereby improving the performance of the receiver further in the presence of sampling clock jitter. The amount of bandwidth reduction possible depends on the order of the filter and the noise amplification provided by the reconstruction matrix. It has been shown that 3rd order filters of bandwidth 1 GHz can be replaced with 1st order filters of bandwidth 100 MHz without any depreciation in the output resolution, implying huge power savings.Item Function of CikA in the cyanobacterial circadian system: the pseudo-receiver domain of CikA regulates the circadian input pathway(Texas A&M University, 2006-10-30) Zhang, XiaofanThe circadian input kinase gene (cikA) was first identified from a Tn5 mutant of Synechococcus elongatus PCC 7942. A cikA null strain shows a striking phenotype related to circadian gene regulation: all sampled loci show a shortened circadian period and reduced amplitude of oscillation and a failure to exhibit a wild-type resetting of the phase of the rhythm after an environmental signal. This global defect in response to the environment suggests a key role for CikA in the circadian input pathways. Bioinformatics results classify CikA as a divergent member of the bacteriophytochrome family, suggesting a role in light signal transduction. In vitro analysis previously showed that CikA is a bona fide histidine protein kinase (HPK), and its kinase activity is regulated by the presence of other domains. Its own pseudo-receiver (PsR) domain is not the cognate receiver domain of its kinase HPK domain, and its GAF domain does not likely bind a bilin chromophore as do photoreceptive phytochromes. Recent results suggested that CikA may function as a redox-sensor. In this study, we examined the function of each domain of CikA using different mutant cikA alleles, and determined their phenotypes with respect to complementation of a null mutant and overexpression in both wild type and cikA null strains. All domains except the featureless N-terminus were required for CikA function. Overexpression of all mutant alleles that encoded the PsR domain, whether or not the HPK was functional, caused a dominant arrhythmia phenotype. In the absence of PsR, overexpressed variants did not cause arrhythmia, but affected the amplitude and period of oscillation. The results suggest a model in which the PsR domain regulates kinase activity and mediates interaction with other input pathway components to allow CikA to reach the correct cellular position to fulfill its function. Cellular localization assays showed CikA can interact with a complex and showed a polar localization pattern, whereas its variant without PsR showed uniform distribution in the cell. In summary, CikA is an autoregulated kinase in which the PsR domain regulates activity of the HPK domain and also serves as an interaction module to lead the CikA to a specific cellular position.