Browsing by Subject "interpolation"
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Item Design of high speed folding and interpolating analog-to-digital converter(Texas A&M University, 2004-09-30) Li, YunchuHigh-speed and low resolution analog-to-digital converters (ADC) are key elements in the read channel of optical and magnetic data storage systems. The required resolution is about 6-7 bits while the sampling rate and effective resolution bandwidth requirements increase with each generation of storage system. Folding is a technique to reduce the number of comparators used in the flash architecture. By means of an analog preprocessing circuit in folding A/D converters the number of comparators can be reduced significantly. Folding architectures exhibit low power and low latency as well as the ability to run at high sampling rates. Folding ADCs employing interpolation schemes to generate extra folding waveforms are called "Folding and Interpolating ADC" (F&I ADC). The aim of this research is to increase the input bandwidth of high speed conversion, and low latency F&I ADC. Behavioral models are developed to analyze the bandwidth limitation at the architecture level. A front-end sample-and-hold unit is employed to tackle the frequency multiplication problem, which is intrinsic for all F&I ADCs. Current-mode signal processing is adopted to increase the bandwidth of the folding amplifiers and interpolators, which are the bottleneck of the whole system. An operational transconductance amplifier (OTA) based folding amplifier, current mirror-based interpolator, very low impedance fast current comparator are proposed and designed to carry out the current-mode signal processing. A new bit synchronization scheme is proposed to correct the error caused by the delay difference between the coarse and fine channels. A prototype chip was designed and fabricated in 0.35?m CMOS process to verify the ideas. The S/H and F&I ADC prototype is realized in 0.35?m double-poly CMOS process (only one poly is used). Integral nonlinearity (INL) is 1.0 LSB and Differential nonlinearity (DNL) is 0.6 LSB at 110 KHz. The ADC occupies 1.2mm2 active area and dissipates 200mW (excluding 70mW of S/H) from 3.3V supply. At 300MSPS sampling rate, the ADC achieves no less than 6 ENOB with input signal lower than 60MHz. It has the highest input bandwidth of 60MHz reported in the literature for this type of CMOS ADC with similar resolution and sample rate.Item Operator valued Hardy spaces and related subjects(Texas A&M University, 2006-10-30) Mei, TaoWe give a systematic study of the Hardy spaces of functions with values in the non-commutative Lp-spaces associated with a semifinite von Neumann algebra M. This is motivated by matrix valued harmonic analysis (operator weighted norm inequalities, operator Hilbert transform), as well as by the recent development of non-commutative martingale inequalities. Our non-commutative Hardy spaces are defined by non-commutative Lusin integral functions. It is proved in this dissertation that they are equivalent to those defined by the non-commutative Littlewood-Paley G-functions. We also study the Lp boundedness of operator valued dyadic paraproducts and prove that their Lq boundedness implies their Lp boundedness for all 1 < q < p < ??????.Item Technology Characterization Models and Their Use in Designing Complex Systems(2011-08-08) Parker, Robert ReedWhen systems designers are making decisions about which components or technologies to select for a design, they often use experience or intuition to select one technology over another. Additionally, developers of new technologies rarely provide more information about their inventions than discrete data points attained in testing, usually in a laboratory. This makes it difficult for system designers to select newer technologies in favor of proven ones. They lack the knowledge about these new technologies to consider them equally with existing technologies. Prior research suggests that set-based design representations can be useful for facilitating collaboration among engineers in a design project, both within and across organizational boundaries. However, existing set-based methods are limited in terms of how the sets are constructed and in terms of the representational capability of the sets. The goal of this research is to introduce and demonstrate new, more general set-based design methods that are effective for characterizing and comparing competing technologies in a utility-based decision framework. To demonstrate the new methods and compare their relative strengths and weaknesses, different technologies for a power plant condenser are compared. The capabilities of different condenser technologies are characterized in terms of sets defined over the space of common condenser attributes (cross sectional area, heat exchange effectiveness, pressure drop, etc.). It is shown that systems designers can use the resulting sets to explore the space of possible condenser designs quickly and effectively. It is expected that this technique will be a useful tool for system designers to evaluate new technologies and compare them to existing ones, while also encouraging the use of new technologies by providing a more accurate representation of their capabilities. I compare four representational methods by measuring the solution accuracy (compared to a more comprehensive optimization procedure's solution), computation time, and scalability (how a model changes with different data sizes). My results demonstrate that a support vector domain description-based method provides the best combination of these traits for this example. When combined with recent research on reducing its computation time, this method becomes even more favorable.