Browsing by Subject "Semiconductor wafers"
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Item Design of an automated inkless wafermap system(Texas Tech University, 2001-05) Zhou, XuelinThis project deals with developing a fully automated inkless wafermap system to implement inkless process for Texas Instruments (TI) foundry wafers. In the process, TI to TSMC (Taiwan Semiconductor Manufacturing Company) automated inkless wafermap system has been designed in accordance with TI computer integrated manufacturing inkless standards. The system developed here also can be used for other foundries and subcons. The results will be evaluated as successful when a fully automatic process of uploading Wafermaps from TSMC server to TI WISH (Wafermap Inkless System Host) system is completed. The conclusions and recommendations for future work are discussed.Item Endpoint detection of silicon wafer etching(Texas Tech University, 1985-12) Sinor, Timothy WayneThis thesis describes the results of an investigation into the use of plane polarized light for performing in situ endpoint monitoring of oxide thickness during the etching of silicon wafers. The continuous monitoring of the oxide thickness can be accomplished by analysis of the reflection characteristics of the plane polarized light. This information then allows the etching to be terminated when the oxide thickness approaches zero, thus, providing a means to control the etching process. To accomplish on line monitoring of the oxide thickness, plane polarized light from an argon ion laser passing through a rotating half-wave plate which alternately switches the polarization from transverse electric (TE) to transverse magnetic (TM). The modulated laser light is specularly reflected from the oxide-coated silicon wafer and is sensed by a silicon photo-detector. A.C. detection techniques are employed to measure the normalized reflectance intensity which is related to the thickness of the oxide coating. Oxide thicknesses on the order of 1000 A can be measured with the device to an accuracy of about 0.4%. Oxide thicknesses less than 50 A cannot be measured with accuracy.Item Fault detection and classification in etch tools(Texas Tech University, 2003-12) Vijayaraghavan, RajeshDuring my 18-month tenure as a coop engineer in the Advanced Process Control module and the Etch module at Advanced Micro Devices, 1 played an important role in the advanced process control mechanism. The objective of my thesis project report is to explain the features and benefits of the fault detection and classification mechanism, with illustrations of its advantages in the etch module ofFab 25 AMD. Advanced process control (APC) is a novel technique in the semiconductor industry. The crux of APC is that some wafer defects do not get detected until the end of the manufacturing process and that the health of a piece of equipment is an indicator of the quality of the product it produces. Since any adverse change in the tool health would have a negative impact on product quality, it would be possible to immediately detect a wrongly processed wafer and take corrective actions, by monitoring equipment health. Using a unique model-based technique, real-time monitoring mechanism, and efficient classification strategies, the FDC Department at AMD has made it possible to accurately determine the health of a piece of equipment in real-time. Equipment-related problems are immediately revealed when the equipment health falls outside a statistically derived limit, which is calculated fi-om in-process data when the equipment is healthy and operating normally. The report gives an idea about my specific roles as a coop engineer, scaling different proportions in various steps of the FDC implementation mechanism. The steps involved in the setting up of the FDC mechanism and the continuous real-time monitoring of the etch plasma stripper processes have been clearly outlined and a few instances of potential faults detected through FDC have also been explained. Current shortcomings and suggestions regarding future enhancements to the existing FDC mechanism have also been presented.Item Process parameters governing deep ultraviolet (DUV) data buffer yield(Texas Tech University, 2002-05) Janakiraman, PraveenaTimely identification of causes for low quality of devices is a primary key to the profit of a semiconductor industry. There are various methods to aid the identification and rectification of defects arising from the wafer manufacturing process. Parametric data analysis is a key method to extract process related information about the wafers. Parameters like idrives, leakage currents, threshold voltages, oxide thickness, critical dimension measurements provide a wealth of details about the manufactured wafers. This thesis aims at addressing the root cause of the problem of low quality of Deep Ultra Violet data buffers after an analysis of process parameters. On finding the cause, a solution to achieving a required quality level is suggested and verified.Item Sixteen-channel temperature controller(Texas Tech University, 2002-12) Nallamudi, Sarath BabuTemperature is a widely measured quantity in the industry. Accurate and repeatable temperature measurement and control are critical to product quality and uniformity in many modem semiconductor manufacturing processes. Different techniques to measure the temperature are studied. One of such technique to measure temperature with a thermistor whose resistance reduces with the increase in temperature is considered. A circuit is developed to control the temperature in 16 channels and to measure the temperature in all 16 channels each time the temperature is controlled in one channel. The circuit is controlled from the Micro controller named BS2IC. A 6" wafer is processed and a pattern is developed on it in order to glue resistors to control the temperature and to glue thermistors to measure the temperature. The Temperature controller is then connected to this wafer and the controller is tested for its functionality.Item The product mix problem for manufacturing of silicon wafers by diffusion process(Texas Tech University, 1988-08) Qasim, Ali MohammedIn silicon wafer manufacturing there are several types of processes conducted in diffusion furnaces with different processing times. Each of these furnaces is dedicated for one type of process. The same type of process can be performed on any of the available furnaces dedicated for that particular process. These furnaces can be grouped in a single aisle or several aisles. The silicon wafers go through a series of controlled environment diffusion furnaces. These furnaces are rarely used to their capacity. A typical efficiency of these furnace tubes is somewhere between 28 to 35% [9]. This efficiency can be increased by assigning the proper number of wafers to these furnace tubes. The problem of finding the number of tubes required for each process to maximize the production is dealt with in this study.Item