Browsing by Subject "Ring oscillator"
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Item Analysis and design of 3 stage voltage rectifier multiplier and 2 stage multi-phase voltage doubler for and energy harvesting system(2012-08) Shrivastava, Ravindranath; Gale, Richard O.; Li, ChangzhiThe reliability and the efficiency of the wireless link between the TX/RX for wireless sensors devices depends on the environmental conditions such as change in the physical distance or changes in the orientation between transmitter and receiver. So the need arises to monitor and the ability to adjust the wireless link between TX/RX without interrupting the operation of the wireless sensor. Also the ambient wireless energy can also be harvested to power the wireless sensor circuitry. We propose an N-Stage Voltage Multiplier/Rectifier built in AMI06 process using a Schottky diode to convert the ambient RF Energy into DC voltage which can be measured to evaluate the strength of the Wireless link. The proposed system can be used to monitoring and vary the wireless link parameters such as the resonant matching condition between TX/RX antenna coil and physical alignment without interrupting the operation of the wireless sensor. Also the DC energy harvested can be boosted further by our proposed multiphase charge pump to a higher DC Level which can be used by the wireless sensor circuitry. The DC power harvested can also be used alongside the on board battery which will lead to increase in battery efficiency. The voltage multiplier/rectifier and charge pump involving the power stage and the feedback circuitry can be built on the same die as the wireless sensor circuitry which can lead to less bulky system.Item Design of charge pump phase locked loop(2012-08) Mishra, Satyabh; Li, Changzhi; Gale, Richard O.Phase Locked Loop system is around since 1932. The versatility of PLL systems and where it can apply makes it very useful. It can be applied to automobiles as well as cellular chips. This thesis work presents design and analysis of a Phase Locked Loop in IC level. It is implemented and designed in a 0.5um CMOS process. All the blocks of the Phase Locked Loop was designed independently and then integrated together. Phase Frequency Detector, Charge Pump, Low Pass Filter, VCO, Frequency Divider and Level Shifter topologies and circuits are described in detail along with some major design tradeoffs and critical issues. The uses and implementation of two kind of frequency divider is demonstrated. Their design tradeoffs are utilized to make design effective and robustItem VCO-based analog-to-digital conversion(2012-12) Hamilton, Joseph Garrett; Hassibi, Arjang; Viswanathan, T. R., doctor of electrical engineeringThis dissertation presents a novel [delta sigma] analog-to-digital converter architecture which replaces the operational amplifier-based integrator with a pair of tunable oscillators. A switched-capacitor V-I converter is used to combine the input voltage with a feedback DAC output and convert it into a current for two pseudo-differential current-controlled oscillators. The oscillator outputs are counted with a digital counter, and a digital back-end [delta sigma] modulator is used to truncate the high-resolution counter outputs for the feedback DAC path. This architecture has compelling advantages in deep sub-micron and emerging technologies where supply voltages are decreasing to a point that traditional analog architectures are no longer feasible. Additionally, this architecture takes advantage of the increased speed in these short-channel technologies. Measured results on a 6.08mW prototype in TSMC 0.18um achieving 63.5dB in a 2MHz bandwidth are presented.