Browsing by Subject "Parallel programming (Computer science)"
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Item A parallel compiler for SequenceL(Texas Tech University, 2002-08) Andersen, Per H.Procedural languages like C and FORTRAN have historically been the languages of choice for implementing programs for high performance parallel computers. This dissertation is an investigation of a high-level nested programming language, SequenceL and whether a SequenceL compiler that compiles to parallel code can be developed for a parallel system. This dissertation has achieved the following results. • Established a proof of concept that there exists a SequenceL compiler that can create executable programs that embody the inherent parallelisms and other implied controls structures in SequenceL, • Developed a new intermediate language capable of representing the meaning of a SequenceL source program, • Developed the techniques for spawning threads to dynamically create parallelisms using a threaded approach, and discovered that the SequenceL language implies a parallel execution model, • Identified a number of optimization and performance enhancement opportunities, • Identified a new SequenceL language requirement for defining nesting and cardinality typing information for SequenceL data structures.Item A SequenceL interpreter using tuplespaces(Texas Tech University, 2003-12) Sundararajan, SriramSequenceL is an implicitly parallelizing language that determines all the parallelisms in a computer program. This thesis is a preliminary investigation into a Tuple space based implementation of SequenceL. The results of the research are: • Tuple space was identified as a simple and straight forward approach to distributed evaluation of SequenceL programs. The tuple space concept matches closely with the SequenceL tableau, parts of which are distributed, evaluated and the result of the evaluation are gathered back. • A SequenceL interpreter and a communication architecture that communicates with a tuple space was developed. • The Gather Work Distribute cycle of the communication architecture was identified to be equivalent to the Consume Simplify Produce strategy followed by SequenceL. • Preliminary testing was conducted and certain enhancements were proposed and implemented.Item Item Implementation and utilization of a heterogeneous multicomputer cluster for the study of load balancing strategies(Texas Tech University, 1997-08) Andersen, Per H.Not availableItem Optimal configuration of a parallel embedded system for synthetic aperture radar processing(Texas Tech University, 1997-12) Muehring, Jeffrey TEmbedded systems often must adhere to strict size, weight and power (SWAP) constraints and yet provide tremendous computational throughput. Increasing the difficulty of this challenge, there is a trend to utilize commercial-off-the-shelf (COTS) components in the design of such systems to reduce both total cost and time to market. Employment of COTS components also promotes standardization and permits a more generalized approach to system evaluation and design than do systems designed at the application-specific-integrated-circuit (ASIC) level. The computationally intensive application of synthetic aperture radar (SAR) is by nature a high-performance embedded application that lends itself to parallelization. Mercury Computer Systems' RACE multicomputer is the COTS computing platform under investigation. With the target software and hardware defined, a system performance model, in the context of SWAP, is developed based on mathematical programming. This work proposes an optimization technique using a combination of constrained nonlinear and integer programming.Item Parallelization of adaptive quadrature rule-based integration methods(Texas Tech University, 2003-12) Walawalkar, Milind PrakashNot availableItem Parallelization of scientific legacy code(Texas Tech University, 2003-12) Hernández, Karem BriceñoPresently, The National Aeronautics and Space Administration (NASA) conducts research through its Earth Observation System (EOS) to answer questions about global dynamics. The most comprehensive EOS instrument is MODIS (The Moderate-resolution Imaging Spectroradiometer) which has several data products. One of these products is MODIS LAI/FPAR (MOD 15). The algorithm for this product consists of two modules: M0DI5A1 which produces series of daily candidates LAI/FPAR data products and MOD15A2 which produces a 8-day composite to be archived. The purpose of the present work is to demonstrate that in spite of the elevated cost implied, parallelization for particular EOS applications might be worthwhile. For this, a previous analysis four years ago of tae serial M0D15A1 code was completed showing that the time may be reduced significantly. For that reason, some changes were made to the code with tae purpose of miming it on parallel. With these changes, an experimental run performed with threads demonstrated that m fact the time reduces to half of the time by using two processors m comparison with the serial version that used only one processor. Given that platforms with more than 2 processors were not readily available at that time, because of price, it is until now that we can easily perform those tests. Therefore, parallelization of this code was motivated to experiment with more processors m order to verify the level of performance that this code could attain, which is the main objective of the present work. With these experiments, it is confirmed that parallelization does improve the execution tune for this particular product but it does not scale up as it is estimated.Item Pointer analysis : building a foundation for effective program analysis(2009-05) Hardekopf, Benjamin Charles; Lin, Yun CalvinPointer analysis is a fundamental enabling technology for program analysis. By improving the scalability of precise pointer analysis we can make a positive impact across a wide range of program analyses used for many different purposes, including program verification and model checking, optimization and parallelization, program understanding, hardware synthesis, and more. In this thesis we present a suite of new algorithms aimed at improving pointer analysis scalability. These new algorithms make inclusion-based analysis (the most precise flow- and context-insensitive pointer analysis) over 4x faster while using 7x less memory than the previous state-of-the-art; they also enable flow-sensitive pointer analysis to handle programs with millions of lines of code, two orders of magnitude greater than the previous state-of-the-art. We present a formal framework for describing the space of pointer analysis approximations. The space of possible approximations is complex and multidimensional, and until now has not been well-defined in a formal manner. We believe that the framework is useful as a method to meaningfully compare the precision of the multitude of existing pointer analyses, as well as aiding in the systematic exploration of the entire space of approximations.