Browsing by Subject "Nanoscale devices"
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Item Carbon nanotube devices : quantum dots, field effect transistors and memory devices(2005-12) Sorger, Volker Jendrik, 1979-; Yao, Zhen, Ph.D.This thesis explores different nanoscale devices based on electron transport through carbon nanotubes. The ability of semiconducting carbon nanotubes to show field-effect-transistor (FET) behavior was explored. Local topgates on the carbon nanotube channel show excellent FET characteristics. Single-electron-transistor characteristics based on Coulomb Blockade were investigated at low temperatures. Quantum dots were created in the nanotube channel by local individual addressable topgates. Furthermore, nanoscale flash memory cells based on carbon nanotube FETs were assembled. The information was stored in redox-active molecules placed in the vicinity of the active channel. Device programming with write and erase gate pulses show on/off ratios close to 10⁴ with retention times of 20 min at room temperature. At liquid nitrogen temperatures the device stays in a stable state for up to 8 hours. At low temperatures, a strong increase in retention time was observed and single electron sensitivity was demonstrated. Endurance tests reveal very stable device characteristics upon at least 10⁵ write and erase cycles. Finally, optoelectronic memory characteristics were demonstrated on a Carbon Nanotube - molecule memory cell.Item Exploring scaling limits and computational paradigms for next generation embedded systems(2009-12) Zykov, Andrey V.; De Veciana, GustavoIt is widely recognized that device and interconnect fabrics at the nanoscale will be characterized by a higher density of permanent defects and increased susceptibility to transient faults. This appears to be intrinsic to nanoscale regimes and fundamentally limits the eventual benefits of the increased device density, i.e., the overheads associated with achieving fault-tolerance may counter the benefits of increased device density -- density-reliability tradeoff. At the same time, as devices scale down one can expect a higher proportion of area to be associated with interconnection, i.e., area is wire dominated. In this work we theoretically explore density-reliability tradeoffs in wire dominated integrated systems. We derive an area scaling model based on simple assumptions capturing the salient features of hierarchical design for high performance systems, along with first order assumptions on reliability, wire area, and wire length across hierarchical levels. We then evaluate overheads associated with using basic fault-tolerance techniques at different levels of the design hierarchy. This, albeit simplified model, allows us to tackle several interesting theoretical questions: (1) When does it make sense to use smaller less reliable devices? (2) At what scale of the design hierarchy should fault tolerance be applied in high performance integrated systems? In the second part of this thesis we explore perturbation-based computational models as a promising choice for implementing next generation ubiquitous information technology on unreliable nanotechnologies. We show the inherent robustness of such computational models to high defect densities and performance uncertainty which, when combined with low manufacturing precision requirements, makes them particularly suitable for emerging nanoelectronics. We propose a hybrid eNano-CMOS perturbation-based computing platform relying on a new style of configurability that exploits the computational model's unique form of unstructured redundancy. We consider the practicality and scalability of perturbation-based computational models by developing and assessing initial foundations for engineering such systems. Specifically, new design and decomposition principles exploiting task specific contextual and temporal scales are proposed and shown to substantially reduce complexity for several benchmark tasks. Our results provide strong evidence for the relevance and potential of this class of computational models when targeted at emerging unreliable nanoelectronics.