Browsing by Subject "Error-correcting codes (Information theory)"
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Item A multibit cascaded sigma-delta modulator with DAC error cancellation techniques(Texas Tech University, 2004-05) Su, Chun-hsienNoise reduction techniques are developed for a multibit cascaded sigma-delta (ÓÄ) modulator used in the analog interface of a digital signal processing system to improve its performance by reducing the errors introduced by digital-to-analog converters (DACs). The idea of the proposed architecture is to create extra feedback paths around the modulator to reduce the DAC errors further by properly designing the error cancellation logic. Transfer functions show that the DAC error at the final stage of the proposed architecture is totally cancelled, while DAC errors from other internal stages are shaped by an order higher than those in a conventional cascaded modulator. The difficulty in circuit implementation of modulators with high resolution and bandwidth increases due to the imperfection of analog components in VLSI processes. Structural and circuit-level compensation techniques are generally used in developing such modulators. Major analog nonideal effects in a multibit cascaded ÓÄ modulator include coefficient mismatches, DAC nonlinearity errors, and integrator leakages. While providing solutions for each of these nonidealities, this dissertation focuses on the minimization of the DAC error since it causes the most performance deterioration. A configurable fourth-order (2-1-1) ÓÄ modulator is implemented for architecture verification. This modulator can be configured as the proposed architecture as well as a conventional cascaded structure with various modulator orders. The design of the system's parameters and analog blocks are fully described in this dissertation. The system is fabricated by the AMI Semiconductor (AMIS) 0.5ìm double-poly triple-metal mixed- signal process through the MOSIS service. Measurement results show that with on-chip error of ±0.15 LSB for each DAC and an oversampling ratio (OSR) of 32, an improvement of 8dB of the proposed architecture over the conventional structure is observed.Item Error correcting codes: local testing, list decoding, and applications(2007-12) Patthak, Anindya Chandra, 1977-; Zuckerman, David I.Item Error-correcting codes on low néron-severi rank surfaces(2006) Zarzar, Marcos Augusto; Voloch, José FelipeItem Multiple error-correction coding for optical matrix-vector multipliers(Texas Tech University, 1995-12) Caglar, Ahmet TankutOptical matrix-vector multipliers are known to suffer from low computational accuracy which is the major drawback preventing them from becoming a practical force in real world applications. Error-correction coding is one technique proposed to overcome this problem of low level accuracy. In this thesis, the effects of the application of multiple error-correction codes to optical matrix-vector multipliers are studied. For this purpose, many different cases were simulated on a computer. Noting that an optical matrix-vector multiplier performs the product y = Ax, basically four cases were considered; signal independent and signal dependent noise in the matrix A, and signal independent and signal dependent noise in the vector x. Two different error-correcting codes were simulated; one being a binary, multiple error-correcting BCH code and other being a non-binary, multiple error-correcting Reed-Solomon code, which is basically an extension of the binary BCH code. The advantages and disadvantages of switching from binary BCH codes to non-binary Reed-Solomon codes were investigated. Based on the results obtained from the simulations, the conditions under which the use of error-correction coding is feasible in optical matrix-vector multipliers are discussed.Item Space-variant processing using phase codes and Fourier-plane sampling techniques(Texas Tech University, 1980-05) Kasturi, RangacharAny slowly varying linear space-variant system can, in principle, be represented holographically by spatially sampling the input plane and multiplexing the respective system transfer functions. A scheme reported earlier for implementing this technique makes use of phase diffusers in the reference beam paths to encode sequentially recorded holograms. However to minimize the cross talk between the holograms upon playback the diffusers should have good correlation properties, In this thesis extensive computer simulations to evaluate the correlation properties of a family of binary phase codes are conducted. An alternative multiplexing technique in which the transfer functions are sampled in the Fourier plane to generate a composite hologram is also described. In this technique the samples of the transfer functions are placed in non-overlapping regions and hence there will be no crosstalk upon playback. However multiple copies of the input function are required during the playback step. The results of preliminary experiments conducted to evaluate this approach for space-variant system representation are presented including the verification of coherent addition using computer multiplexed holograms.Item Synchronization recovery and error-correcting codes.(Texas Tech University, 1974-12) Qureshi, Mohammed YahyaNot availableItem Two Dimensional phase codes for multiplex holography(Texas Tech University, 1978-05) Redus, Wesley DeanThe coherent optical processor is a form of analog system which uses the properties of lenses and coherent light to represent an optical system. In this thesis, representations of space-variant optical systems are discussed. The input sampling approach to the representation of a space-variant optical system is implemented by recording many transfer function holograms on one medium. The holograms are indexed by encoding the phase of each reference beam by using a diffuser whose phase transmittance is a unique member of a family of pseudo-random binary phase codes known as Gold codes. Computer simulations of this process are discussed, and results of these simulations are shown and compared with experimental results. Further development is encouraged in the area of recording larger numbers of holograms on the recording medium, and exploring the process of coherent addition of overlapping outputs of the processor.