Browsing by Subject "Converting algorithms."
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Item Accelerating path planning algorithms with high level synthesis tools and FPGAs.(2013-05-15) Trower, John W.; Duren, Russell Walker.; Electrical and Computer Engineering.; Baylor University. Dept. of Electrical and Computer Engineering.Accelerating path planning algorithms with field programmable gate arrays (FPGA) allows the designer to achieve significant performance increases over using a traditional central processing unit (CPU). Converting an algorithm to run on an FPGA is a complicated and time consuming process. This thesis develops and verifies a design framework that demonstrates how to design a path planning algorithm in a high level language, then convert the algorithm into hardware description languages using high level synthesis tools. This design framework will be used to demonstrate the acceleration of a genetic algorithm.