Browsing by Subject "Complementary"
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Item A fully differential CMOS operational amplifier implemented with MOS gain boosting technique(Texas Tech University, 1996-05) Lo, PingThis thesis investigates the gain boosting technique proposed by K.Bult and G. Geelen [9]. An improved cascode circuit that combines both high gain and high speed is developed. Using this cascode circuit, a high performance fully differential operational amplifier is designed. A prototype of the cascode circuit and operational amplifier was fabricated in a 2 |im n-well CMOS technology. Simulation results indicate that the cascode circuit has at least 100 MQ output impedance, while the amplifier has an open loop gain of 98 dB and a unity gain frequency of 17 MHz for 10 pF load capacitor.Item A high-speed, high-resolution sigma-delta modulator analog-to-digital converter(Texas Tech University, 2004-05) Fang, LieyiSigma-delta modulators provide the means for achieving high-resolution analog-to- digital conversion. The main limitation faced in the high-resolution Sigma-Delta approach is conversion speed. A multi-stage multi-bit sigma-delta modulator with interstage gain scaling is proposed in this study, and it is designed and implemented in a 0.6 ìm CMOS process. This topology employs a second-order single-bit modulator in the main stage followed by an 8-bit quantizer in pipeline structure. The second stage of the modulator consists of a first-order single-bit modulator followed by a 5-bit quantizer. A gain stage is inserted between the two stages to scale the signal level to within the reference level. System and circuit level simulations have demonstrated that the proposed modulator is capable of achieving high speed and high resolution in analog-to-digital conversion. The detailed design considerations in circuit implementation of the proposed modulator are also analyzed and discussed. The prototype is fabricated in a 0.6 ìm CMOS process with 3.3V power supply. Experimental measurement of the prototype is performed. Several factors limiting the performance are discussed.Item CMOS modular register file for CPU design(Texas Tech University, 2000-05) Gu, XiaowuFrom the above discussion, the building block-pased design is one of the top choices in present integrated circuit design world. By using basic building blocks, largescale digital design can achieve lower cost, higher speed, higher reliability, shorter design time and flexibility. Currently, to invesfigate the nature and advantages of building block design, a tool library with various functional building blocks in layout form is being designed in our research group. In addition, in the near future, some microprocessors will be built up by connecting those powerful, fast, expandable and flexible functional building blocks together as design examples of the building block-based design method. A basic microprocessor has a timing and control unit for sequencing, an arithmetic logic unit (ALU) for processing instmctions, an instmction decoder, and register banks for temporary storage during arithmetic operation. Figure 1.1 [2] shows a diagram of a basic microprocessor.Item Efficient algorithms for gate matrix layout(Texas Tech University, 1988-05) Rathinaswami, Selliah CNot availableItem High-resolution analog-to-digital conversion techniques(Texas Tech University, 1988-12) Yung, Henry TNot availableItem Investigation of advanced gate dielectrics for future complementary metal-oxide semiconductor devices(Texas Tech University, 2002-05) Mehta, Narendra SinghNot availableItem Low power/low voltage LVDS (low voltage differential signal) receiver design(Texas Tech University, 2001-08) McCormick, Michael DThe focus of this thesis is to investigate the application of low-voltage/low-power design to an LVDS (Low Power Differential Signal) receiver. The power consumption and necessary source voltage levels in current CMOS circuits is dependent on the size of the transistors used and the design topology utilized to realize the circuit. A CMOS process design solution is desired to reduce the power consumption and source voltage of an LVDS receiver while maintaining full speed operation to improve overall receiver efficiency and lower receiver operating voltage from 3.3V to 1.8V. Testing and optimizing of the design of the low-power/low-voltage LVDS receiver is done through simulation and measurement of various parameters on Pspice. Tradeoffs in low-power/low-voltage circuit design are presented and investigated to determine a solution for real world application.Item Modular CMOS ALU control unit(Texas Tech University, 1999-08) Mula, Pavan R.Modular based design is used for flexibility, simplicity and to lower the cost and labor in designing general purpose or application specific digital circuits. This research investigates the nature and advantages of digital building blocks by implementing a modular based design, 8-bit ALU control unit. The 8-bit ALU control unit is designed using Logic Works 3.0.3, laid out using L-Edit (Version 7) and simulated in PSpice. This paper contains the design method, layout considerations and simulation results. It also discusses history, advantages and problems with digital building blocks.