Browsing by Subject "CMOS RF"
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Item A CMOS Fractional Frequency Synthesizer for a Fully Integrated S-Band Extravehicular Activity (EVA) Radio Transceiver(2014-04-28) Foli, Eugene BExtravehicular activity (EVA) is an important aspect of space explorations. It enables astronauts carry out tasks outside the protective environment of the spacecraft cabin. The crew requires EVA radio transceivers to transmit and receive information among themselves and with equipment in space. Communication is done through the S frequency band (2GHz to 4GHz). Since the EVA radio transceiver is part of the space suits the astronauts wear for EVA, it is important that lightweight, low power consumption and miniaturized systems are utilized in their design and implementation. This thesis presents the design and implementation of a fully integrated frequency synthesizer for carrier signal generation in the EVA radio transceiver. The transceiver consists of a dual up-conversion transmitter (TX) and a direct conversion receiver (RX) at 2.4GHz. It supports 10 channels spaced at 6MHz for both video and voice communications, covering the frequency band from 2.4GHz to 2.454GHz. Therefore in the TX mode, the frequencies required are 0.8GHz to 0.818GHz (quadrature) and 1.6GHz to 1.636GHz (differential) for dual up-conversion to prevent the pulling problem between the power amplifier (PA) and voltage controlled oscillator (VCO) of the synthesizer. In RX mode, the frequencies from 4.8GHz to 4.908GHz are synthesized with a divide-by-two circuit to generate quadrature signals of 2.4GHz to 2.454GHz. In order to cover the frequency ranges in both TX and RX modes with a small area and low power consumption, a dual-band VCO fractional-N PLL is implemented. The dual-path loop filter topology is utilized to further reduce chip area. The fractional synthesizer is fabricated in 0.18?m CMOS technology and has a loop bandwidth of around 40kHz. It occupies a relatively small area of 1.54mm^(2) and consumes a low power of 22.68mW with a 1 V supply for the VCO and 1.8V supply for the rest of the blocks. The synthesizer achieves a reference spur performance of less than ?62.34dBc for the lower band (LB) and less than ?68.36dBc for the higher band (HB). The phase noise at 1MHz for the LB ranges from -125.38 to -130.39 dBc/Hz and for the HB -113.12 to -120.16 dBc/Hz. Thus the synthesizer achieves low power consumption with good spectral purity while occupying a small chip area making it suitable for EVA radio applications.Item CMOS RF front-end design for terrestrial and mobile digital television systems(Texas A&M University, 2007-09-17) Xiao, JianhongWith the increasing demand for high quality TV service, digital television (DTV) is replacing the conventional analog television. DTV tuner is one of the most critical blocks of the DTV receiver system; it down-converts the desired DTV RF channel to baseband or a low intermediate frequency with enough quality. This research is mainly focused on the analysis and realization of low-cost low-power front-ends for ATSC terrestrial DTV and DVB-H mobile DTV tuner systems. For the design of the ATSC terrestrial tuner, a novel double quadrature tuner architecture, which can not only minimize the tuner power consumption but also achieve the fully integration, has been proposed. A double quadrature down-converter has been designed and fabricated with TSMC 0.35????m CMOS technology; the measurement results verified the proposed concepts. For the mobile DTV tuner, a zero-IF architecture is used and it can achieve the DVB-H specifications with less than 200mW power consumption. In the implementation of the mobile DVB-H tuner, a novel RF variable gain amplifier (RFVGA) and a low flicker noise current-mode passive mixer have been proposed. The proposed RFVGA achieves high dynamic range and robust input impedance matching performance, which is the main design challenge for the traditional implementations. The current-mode passive mixer achieves high-gain, low noise (especially low flicker noise) and high-linearity (over 10dBm IIP3) with low power supplies; it is believed that this is a promising topology for low voltage high dynamic range mixer applications. The RFVGA has been fabricated in TSMC 0.18????m CMOS technology and the measurement results agree well with the theoretical ones.