Chiou, Derek2011-06-172011-06-172017-05-112011-06-172011-06-172017-05-112011-05May 2011http://hdl.handle.net/2152/ETD-UT-2011-05-3302textDesigning a modern processor is a very complex task. Writing the entire design using a hardware description language (like Verilog) is time consuming and difficult to verify. There exists a split architecture/microarchitecture description technique, in which, the description of any hardware can be divided into two orthogonal descriptions: (a) an architectural contract between the user and the implementation, and (b) a microarchitecture which describes the implementation of the architecture. The main aim of this thesis is to build realistic processors using this technique. We have designed an in-order and an out-of-order superscalar processor using the split-description compiler. The backend of this compiler is another contribution of this thesis.application/pdfengMicroprocessorsMicroarchitectureProcessor architectureSplit-description compilerSuperscalar processorsGenerating RTL for microprocessors from architectural and microarchitectural descriptionthesis2011-06-17