Unrestricted.2016-11-142011-02-182016-11-142003-05http://hdl.handle.net/2346/13327The intent of this thesis work is to optimize the procedure of testing microprocessor memory. The following work explains a way to optimize memory testing by implementing the Memory Test Option, in other words, by having the memory test patterns generated algorithmically, thereby, achieving a vast amount of pattern size reduction. The Memory Test Option enabled a compression ratio in the order of tens of thousands and freeing the precious resource of tester memory of other purposes.application/pdfengComputer input-output equipmentComputersTesting L2 cache in a microprocessor by implementing memory test optionsThesis