Unrestricted.2016-11-142012-06-012016-11-142006-12http://hdl.handle.net/2346/17251This thesis describes a project on large microprocessor integrated circuits using very large scale integration (VLSI) technologies. This project will serve to confirm the hypothesis that using large microprocessors with embedded static random access memory (SRAM) yield model results can filter devices that are predicted to fail at the final test due to the number of SRAM repairs. This model will help reduce cycle time.application/pdfengSRAMThesis