Quantum simulation of device physics for the pseudospintronic devices



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It has been predicted that room-temperature electron-hole exciton condensation may be possible in dielectrically separated and exchange-correlation-coupled two-dimensional material bilayer systems, which is the fundamental basis for a family of new device proposals—the pseudospintronic devices. These new devices employ the global interlayer phase coherence accompanying the condensation, with the “which layer” degree of freedom as the “pseudospin” and the coherent phase as the “pseudospin phase.” The interlayer transport is expected to be greatly enhanced by this phase coherence up to a critical interlayer current and the associated critical voltage possibly below thermal temperature k [subscript B] T/q. Beyond that, the DC enhancement of interlayer transport will be lost and a rapid AC oscillation will emerge; the latter could be filtered out by RC constants of circuits. This transition serves as the ON/OFF mechanism, allowing the power crisis faced by traditional CMOS devices be solved via this potential low-voltage and, thus, low-power operation. A highly efficient, highly flexible full-quantum Hartree-Fock numerical simulator is developed in this work to study the device physics of pseudospintronic devices via modeling the interlayer exchange correlations. The dependences of possible room-temperature condensates are explored on orientational misalignments and short-range disorders in bilayer graphene systems and on different materials—preliminarily ideal MoS₂ bilayers belonging to the TMD family—as new potential hosts of such condensates. The possibility of room-temperature condensates is disproved in neither systems, although other issues could make the condensate formation challenging. Not focusing on those challenges, the simulator is modified and applied to study the transport physics in the presence of spatially confined condensates in bilayer graphene systems. The expected behaviors, including not only aforementioned low-voltage switching and greatly enhanced interlayer transmission, but also a near-ideal Coulomb drag and a theoretically expected underlying process much resembling the Andreev reflection, are all demonstrated in these simulations in nanoscale devices at room temperature. A new current-controlled scheme of pseudospintronic device, the BiSJT, is proposed based on exhibited physics, along with an extracted compact model for circuit simulations. Conventional and novel BiSJT-based logic gates are designed, with circuit simulations to illustrate the logic functionality and still low-voltage, low-power operations.