Reliability and Condition Monitoring of SiC Power MOSFETs

Silicon Carbide (SiC) power devices have witnessed increasing mainstream adoption in transportation over the past decade. This is mainly because of the SiC’s high breakdown strength, and thermal conductivity which translates to higher blocking voltage capability, efficiency, and switching frequency compared to their silicon (Si) counterparts. Being a relatively new technology, the long-term reliability of SiC MOSFETs in the field is not well-known, and some reliability concerns still warrant attention. In particular, the gate-oxide in SiC is inherently more susceptible to degradation when compared to Si devices. To prevent potentially catastrophic failures especially in safety critical applications, it is essential to address existing reliability concerns and improve the overall system reliability. This dissertation aims to study the reliability and condition monitoring of SiC power MOS- FETs. The dissertation first proposes two novel precursors, namely the Miller capacitance and gate-source capacitance changes, which are independent of temperature, for monitoring gate oxide degradation in SiC MOSFETs. These precursors allow for gate oxide degradation monitoring without the need for decoupling the effects of package degradation. Using these findings, the study presents a straightforward in-situ circuit for early warning monitoring of gate oxide aging. Next, this dissertation introduces an effective solution for monitoring gate- oxide degradation in SiC devices using transfer characteristics. In particular, this dissertation proposes a plug-in circuit for the gate driver that can extract transconductance (gm) and threshold voltage (Vth) values from the transfer characteristic with high precision. Lastly, this dissertation proposes a 120 KVA AC power cycling test setup designed for high-power Silicon Carbide (SiC) modules. Currently, there is a lack of early warning signals for drivers to replace critical components in traction applications. To address this issue, this dissertation proposes suitable precursors for all dominant failure mechanisms and corresponding condition monitoring tools to monitor device aging on power converters. These monitoring tools are integrated into the built-in desaturation protection circuit of the gate driver for low-cost and practical implementation. The study monitors the on-resistance of all twelve switches online as a temperature-sensitive electrical parameter (TSEP) to measure the devices’ junction temperature. To reduce the processing load on the microcontroller, the study also intro- duces an out-of-order equivalent time sampling technique for data sampling, which yields a measurement error of less than 1.5%.