Performance enhancement in column IV mobility, bandgap, and strain engineered MOSFETs



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Since the introduction of MOSFETs into the integrated circuit (IC), performance has been improved by device scaling. As device dimensions have scaled into the sub- 100nm regime, the challenges to device scaling have become increasingly significant and harder to surmount and other methods to complement scaling must be investigated and introduced into the industry. Enhancing carrier mobility can increase drive current. Compressively strained Si1-xGex and Si1-x-yGexCy provide a means of improving hole mobility, while tensile strained Si enhances both hole and electron mobility. The use of high-k gate dielectrics can increase MOSFET drive current while also increasing the ION to IOFF ratio. HfO2 has gained prominence in the search for a Si-compatible high-k dielectric. In this work, tensile strained Si1-yCy films and compressively strained, Si1-xGex and Si1-x-yGexCy films were grown via UHVCVD for device and process development studies. A nanometer-scale fabrication process was developed to fabricate sub-100nm PMOSFETs on these films, with both SiO2 and HfO2 being used as gate dielectrics. From these devices it was determined that Si1-xGex can be used in buried channel (with SiO2 gate dielectrics) and surface channel (with HfO2 gate dielectrics) to provide drive current enhancement in deeply scaled devices. This work demonstrates that higher mobility in Si1-xGex films can be used to recover the mobility degradation caused by using high-k gate dielectrics. In addition to drive current enhancement, it has been demonstrated that by process optimization, desirable short channel effects can be achieved in these devices. It is also shown that despite drive current enhancement at long channel length, deeply scaled Si1-x-yGexCy PMOSFETs do not provide drive current enhancement over Si. However, they have improved short channel effects. In recent times tensile strained Si has emerged as a favorable choice to improve carrier mobility and CMOS performance. As part of this work, hot-carrier degradation was studied in tensile-strained Si NMOSFETs. In addition to increased mobility and drive currents, it has been shown that these devices also possess decreased susceptibility to hot-carrier degradation. Simulation and experimental results indicate that this was due to the increased barrier to hot electron injection into the gate.