Voltage-mode controlled synchronous DC-DC buck converter using 0.13[mu] CMOS switches

dc.contributor.advisorAbraham, Jacob A.en
dc.contributor.committeeMemberWang, Xianyaoen
dc.creatorWolfe, Brandon Warden
dc.date.accessioned2012-02-27T16:10:20Zen
dc.date.accessioned2017-05-11T22:24:44Z
dc.date.available2012-02-27T16:10:20Zen
dc.date.available2017-05-11T22:24:44Z
dc.date.issued2011-12en
dc.date.submittedDecember 2011en
dc.date.updated2012-02-27T16:10:27Zen
dc.descriptiontexten
dc.description.abstractThis report is a study of the effects of a commercial 0.13[mu] process and automotive temperature corners on a synchronous DC-DC buck converter design. The basics of switching converters will be explored with an emphasis on voltage-mode controlled feedback. A Type-III compensation network is designed using transfer function analysis to compensate for the inherent double pole introduced by an LC network. The output of the compensation network will drive a pulse width modulation comparator to vary the duty cycle of the high-side PMOS and low-side NMOS transistor switches. After the synchronous buck converter design was complete, the effect of process and temperature on efficiency, output voltage ripple, inductor peak to peak current, and output voltage load response was examined.en
dc.description.departmentElectrical and Computer Engineeringen
dc.format.mimetypeapplication/pdfen
dc.identifier.slug2152/ETD-UT-2011-12-4810en
dc.identifier.urihttp://hdl.handle.net/2152/ETD-UT-2011-12-4810en
dc.language.isoengen
dc.subjectSynchronous buck converteren
dc.subjectVoltage mode controlen
dc.subjectCMOS switchesen
dc.subject0.13[mu] processen
dc.subjectPulse width modulationen
dc.titleVoltage-mode controlled synchronous DC-DC buck converter using 0.13[mu] CMOS switchesen
dc.type.genrethesisen

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