Novel flash memory with nanocrystal floating gate



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The semiconductor market, despite some dips, has been generally increasing for a long time, and this increase is expected to continue in the coming decades. A large fraction of this market is from flash memory. The flash memory device has attracted more and more attention in recent years due to its advantages of high density, low power consumption and low cost. To achieve the further scaling down of the memory device, nanocrystals have been widely studied as the floating gate in the next generation of flash memory. This dissertation addresses the issue of gate stack scaling and voltage scaling for future generations of flash memory, and proposes solutions based on new memory structures and new materials that are compatible with current CMOS process flows. Our efforts to improve the performance of flash memories fall in three categories. First, a multi-layered tunnel barrier (VARIOT structure) is introduced, and the experimental VARiable Oxide results show that the programming speed of this device can be improved since the charges only need to penetrate a very thin barrier during the programming mode, while they face a much thicker barrier in the retention mode. Next, chaperonin GroEL protein molecules have been demonstrated to be a good candidate as the template to obtain a well ordered high density nanocrystal pattern. A flash memory device with SiC nanocrystals based on this technique is demonstrated. The retention time is enhanced due to the deep potential well created by SiC nanocrystals. Finally we demonstrate the improved chemical and electrical quality of Ge nanocrystals through passivation with a Si shell, whereby much better retention characteristics of flash memories with Ge nanocrystals having Si shell is obtained. We conclude with a study not to improve the device performance but to clarify a controversy about where exactly the trapped electrons are stored. The flash memory device with SiGe nanocrystals has been used to investigate the trapping site of the electrons in the floating gate. The experimental results show that the programmed electrons are stored in deep trap states of the surface of the semiconductor quantum dots, and those states are localized a few hundred meV below the semiconductor conduction band.