Applications of Machine Learning in Test Cost Reduction, Yield Estimation and Fab-Of-Origin Attestation of Integrated Circuits

The semiconductor manufacturing industry is one of the most technologically advanced and cost-intensive industries. It has been a key driver for economic development and has powered the growth in computers, consumer electronics and the internet industry. Semiconductors are becoming indispensable in health-care, automobiles, defense and wireless communication. The rapidly growing and dynamically changing electronics market introduces interesting and complex challenges for semiconductor manufacturing companies. One such challenge is identifying production problems and increasing yield of integrated circuits (ICs), which is getting more difficult due to the complexity of new technology nodes. Another major challenge is the test cost that can be devoted to testing each die before it is shipped to a customer. This is important because continuous pressure for superior performance, along with intensified process variations in the latest technology nodes, have resulted in stringent limitations in the test cost. A most recent challenge in the semiconductor industry is security concerns regarding integrity of the electronics supply chain due to globalization and fab-less paradigm.

To address these challenges, researchers have developed solutions based on statistical techniques and machine learning methods. The range of these solutions are from pre-silicon simulation-based methods to data analytic techniques that utilize post-silicon high-volume production data. In simulation-based domain, a rich dataset is available to examine and evaluate proposed solutions. However, these methods are very time-consuming and have a limited view of process statistics, as their grounding to silicon is established only through the variation models reflected in the process design kit (PDK). On the other hand, silicon-based learning methods are often impractical because of extra cost/overhead and new modifications in the production line.

The aim of this work is to address these challenges and provide fast, accurate and feasible solutions using high-volume production data. More specifically, this dissertation introduces an adaptive test cost reduction method that successfully reduces the test cost significantly while abiding the industry principles in order to be readily deployable with minimal test operations support. A fast and accurate yield learning methodology is proposed to forecast high volume manufacturing (HVM) yield of a device based on production datasets from few engineering wafers. Finally, an advanced machine learning approach is proposed to attest the fabrication facility that manufactures a given IC.