Utilization of BIST memory testing techniques

Abstract

Digital Signal Processors are made with a large area of the die dedicated to memory. A significant portion of testing cost for the processors is used to test and repair memory. A new and efficient testing method has been developed to substantially reduce this test cost. In this paper the efficient built-in self-test method is compared to the more established direct test method by quality and overall test cost. A discussion of basic embedded memory systems and the failure types that can occur in them is included. Some of the more common memory testing patterns and test methods are explained. How the built-in self-test is to be developed is explained, along with a test plan to compare the built-in self-test with the direct test method. The results developed in this paper show that the built-in self-test has the same quality of the direct test method and is only a fraction of the testing cost.