Fabrication Of A Silicon Single Electron Transistor

Single electronics has bright prospects because of its high scalability. The single electron transistor (SET) which utilizes these principles could replace the current workhorse of the industry, the MOSFET. The SET is plagued with limitations such as, a low operating temperature, background charge issues, a low voltage gain and high output impedance. The current generation SET devices have overcome most of the aforementioned issues but use highly complicated fabrication techniques. Electron beam lithography was used to pattern device structures on silicon-on-insulator (SOI) wafers with a hydrogen silsesquioxane (HSQ) system being the resist. The silicon was then etched using HSQ as the mask in a deep reactive ion etcher with SF6 and O2 gasses. Experimentation was also carried out on other electron beam resists namely UVN30 and PMMA; these were incompatible with my fabrication technique due to their resolution capability and etch resistance respectively.